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Apple Analog IP Design Lead Israel, Jerusalem District, Jerusalem 130782773
30.05.2024
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Description
Defining and specifying requirements and circuit architecture for analog IP design, lab bring-up, characterization and debug, write specifications, test plans and characterization reports, supporting Apple system teams with product integration, work with chip design teams, system HW and SW design teams, ATE PEYou will be responsible for the following:1. Work with architecture team to define the IP microarchitecture spec. Refine the spec with reviews with other teams2. Develop the circuit design of the IP following established design guidelines based on microarchitecture spec. Own all aspects of circuit design development.3. Work and collaborate with other designers in the group to deliver results.4. Work with FE & BE teams to ensure quality analog integration5. Work with power/performance and functional verification team to define and validate operation sequences6. Work with multi-disciplinary teams to make sure designs are delivered on time and with highest quality by incorporating proper checks at every stage of the design process7. Work with post silicon validation groups to ensure the IP meets the power/performance targets
Key Qualifications
- 10+ years experience in analog IC design.
- Deep understanding of transistor device characteristics.
- Deep understanding of power, performance and area trade-off in mixed-signal designs.
- A proven track record of high-performance designs in high volume production for low power applications.
- Knowledge of analog IC design flow and tools.
- Strong communication skills are a must, as the candidate will interface with a lot of different groups within the company.
- Excellent social skills and high degree of self interpersonal skills suited for working in a remote setting with team members across multiple time zones.
- Hands-on design expertise in one or more of the following areas: High Speed, Low Power I/O Circuit Design: familiarity with PHY principles and concepts including forwarded clock topologies, training and calibration schemes etc.); High Speed Clock Path: low jitter distribution, DCD correction, phase shift (through delay lines or phase interpolation); Analog Front End: low noise and high-resolution signal conditioning prior to ADC and Op-Amp, switched-cap and continuous time filters, reference/bias generation, LDO etc.; Data Conversion: ADC and DAC subsystem. Different styles of data converters (ΔΣ, SAR, pipelined, SAR and flash) and associated calibration techniques.
- Strong initiative and ownership of responsibilities, productive
- Ability to work well in a team and be productive under tight schedules
- Experience with advanced FinFET CMOS processes - an advantage
Education & Experience
BS.c in Electrical EngineeringMS.c\ PhD - advantage
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