Microsoft Principal Firmware Engineer 

Taiwan, Taoyuan City 

407720086

engineers to help achieve that mission.

cutting edgenew technologya mission

Hardware/Firmware for server, silicon, and rack infrastructureof Cobaltand Maia

with experienceSystem on Chip Architecture (SoC),ring up of SoC, root causing issuesat the intersection of multiple subsystems across firmware and hardwareanage debugging at scale forconnected fleets

Required Qualifications

• Bachelor’s or higher in Computer Science, Computer Engineering, Electronics Engineering, or similar.
• 15+ years of working experience in large scale system design & architecture, development, testing, and release and performance tuning.

• Experience with Platform initialization, Board support package (UEFI/U-Boot), integration, low level drivers for peripherals such as PCIe, I2C, eMMC, SPI, USB, UARTs as well as Memory Management, Scheduling, Interrupts,and multi-threading.

• Hands on experience in programming in C or C++

• Strong problem solving, debugging, and troubleshooting skills.

• inDesign for Debug (DFD)

Preferred Qualifications

• Familiarity with secure debug topics for ARMTrustZoneand related security architectures

• bility to triage issues across hardware, firmware, and distributed systems.

• toARM-specific debug solutions:CoreSight, Debug Access Ports (DAPs), Embedded TraceMacrocells(ETMs), System TraceMacrocells

• leveragingdeep domainexpertiseto influence product roadmap

• about exploring and deploying noble methods to improve coverage,debugging, and efficiency of our FW releases.

and/or government security screening requirementsfor this role. These requirements include but are not limited to the following specialized security screenings: Microsoft Cloud Background Check: This position will beto pass the Microsoft Cloud Background Check upon hire/transfer and every two years thereafter.

• You willarchitect scalable debug solutions forpre-silicon, post-silicon,

• You willimplement high-performance debug infrastructure includingtrace, debug interfaces(e.g., JTAG,CoreSight), and system observability pointsensuringcoverage for functionality, performance, and power metrics.

• You will be involved with all phases of product developmentincluding pre-silicon, post-silicon, and platform deployment in the datacenter.

• You willperform data exploration and root cause analysis forSoCor platform-level issues.

• You willuse telemetry and logs for triage across multiple components and services.

• You will collaborate with platform architects, firmware architects, programmanagementandcomponentdev teamsforunderstanding the technical depth of the features and definingSoC Debug Architecture,debug signalsinto Fleet systemsand defineFramework for SoC Debugging/Tools/methodologyfor End-to-end feature readiness

• Stay ahead of industry trends and ensure debug capabilities align with future SoCarchitectureand security requirements

• You willidentifyand address inefficiencies and gaps in architecture, testing, execution, etc.

• You will mentor, guide, and help peers and other team members.

• Ability to see system level “big picture” tovalidatethat the integrated firmware/system software aligns to architectural goals of product.

• Clear technical writing andcrossorginfluence; ownership of specs, reviews, and signoffs consistent with our Job Architecture expectation