Intel IP Design Verification Engineer 

United States, Texas 

389218523

Job Description:

• About the team:
  • I/O Memory Management Unit ( IOMMU ) IP is an integral part of Client and Server products, which enables I/O Virtualization (Intel VT-d) on Intel platforms. In today’s AI-focused datacenters and personal computing platforms, there is a renewed focus on improving the power, performance of I/O workloads, and security between different execution contexts. IOMMU plays a critical role in all of this.
  • The team is an ambitious, mission-focused team primarily based out of the U.S.
• What you get:
  • You will be working on an IOMMU IP that goes into the latest, cutting-edge Intel Server (Xeon) and Client products
  • Intel is a pioneer in I/O interconnect architecture. You will be exposed to the latest generation of IO protocols
  • Intel’s network for mentorship and career development
  • Opportunity to work with and learn from talented engineers responsible for some of the most fundamental building blocks in x86 architecture.
• Job Description and Responsibilities will include but are not limited to:
  • Developing and owning functional verification infrastructure (checkers, stimulus, agents, coverage, scripts etc.) of IP logic to ensure design will meet architectural specifications.
  • Formulating and deploying comprehensive regression test suites to find all possible bugs
  • Development and In-depth analysis of cover points to meet feature expectations.
  • Participating and/or driving technical reviews and test plans of new features for future products with design and architecture teams.
  • Developing and deploying test cases and infrastructure for validating IP performance requirements, and analyzing performance gaps
  • Assist in debugging SoC Pre- and Post-Si issues

Qualifications:

You must possess the below minimum qualifications to be initially considered for this position. Preferred qualifications are in addition to the minimum requirements and are considered a plus factor in identifying top candidates.

Minimum Qualifications:

• Bachelor's or Master’s Degree or equivalent with 5+ years of experience.

Preferred Qualifications:

• Demonstrate knowledge of developing testbench infrastructure, checkers, and integrating VIP collateral such as BFMs.
• Development of test sequences to verify the IP against the HAS is a requirement.
• Root cause test failure down to the RTL level is plus.

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