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What you’ll be doing:
Develop inhouse tools and solutions
Responsible for flow automation, quality control and performance improvement of NVIDIA VLSI Physical Design flow
Work with EDA vendors on tools evaluation and improvement
What we need to see:
MS/PhD in CS/EE
Proficient user of C/C++/Python/Perl is preferred
Ways to stand out from the crowd:
Basic knowledge of device model, processing technology, timing, noise and power in chip design
With analytical ability on placement, routing, timing, clock, power, noise and DFM
Experience on Mathematical algorithm and data structure for VLSI CAD
Hands-on background in EDA software from Synopsys(DC/ICC2/STAR-RC/PT/ICV),Cadence(Genus/Innovus/Quantus/Tempus/PVS),ANSYS (Seahawk/Redhawk) etc is a plus
Hands-on experiences in DL/ML projects/programs is a plus
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