Broadcom Senior IC Layout Design Engineer 

United States, California, San Jose 

331172235

Layout design of high precision analog / mixed signal circuits subject to multiple constraintsDebug LVS/DRC/ERC/ANT errors with verification toolExperience required on technologies: 40nm, 16nm / 7nm FinFet-Knowledge of I/O, ESD, packaging, CAD setup, Cadence SKILL and Unix scripting is a plusBachelor's and 8+ years of related experience requiredJob Requirements:
-Minimum four years of experience in layout design of high precision analog / mixed signal circuits in deep submicron process
-Solid knowledge of precision and low noise analog layout techniques
-High proficiency in driving Cadence Virtuoso layout / schematic and Mentor Calibre tools for layout
-Experience in ADC, DAC, amplifiers, filters and other mixed signal blocks is highly preferred
-Experience in high level floor planning and integration of Analog Front End and / or full chip is desirableBachelor's and 8+ years of related experience required

Compensation and Benefits

The annual base salary range for this position is $106,800 - $178,000

This position is also eligible for a discretionary annual bonus in accordance with relevant plan documents, and equity in accordance with equity plan documents and equity award agreements.