Share
We are seeking an innovative senior timing signoff and constraint methodology engineer to develop pioneering timing sign-off strategies for next-generation GPUs and SoCs. In this role, you’ll develop methodology and flows to validate timing constraints from RTL to netlist via structural, functional and cross-hierarchy constraints checks. We're looking for someone passionate about the challenges of designing most complex deep sub-micron design (3nm and beyond) who thrives on pushing the limits of precision and scalability. You’ll collaborate across teams to shape methodologies that influence the entire future of computing.
What you will be doing:
Develop mythologies and flows to validate constraints with industry-standard tools (e.g., PrimeTime, SNPS TCM ) and debug anomalies in timing reports.
Support tapeout-quality STA environments that are scalable, reusable, and validated through both structural and formal processes for constraint correctness
Analyze RTL clock constructs to derive clock definitions and relationships for timing analysis.
Interpret hierarchical clock structures, including clock cell usage and propagation paths, to build signoff-accurate timing environments.
Write automation scripts in Perl, Python, and C++ for constraint generation, validation, and structural checks.
Create and enforce clock-related structural checks (e.g., valid crossing of clock domains across hierarchical boundaries).
Collaborate with RTL, physical design, and verification teams to drive consistency and correctness across design stages.
What We Need To See:
MS (or equivalent experience) in Electrical or Computer Engineering with 4+ years’ experience in ASIC Design and Timing.
Expertise in Primetime and timing constraints
Knowledge of device physics, STA methodology.
Exposure to RTL to GDSII flows
Good understanding of mathematics/physics fundamentals of electrical design.
Expertise in coding- TCL, Python. C++
Strong communications skill and good standout colleague
You will also be eligible for equity and .
These jobs might be a good fit