Nvidia Senior CDC STA Engineer 

United States, Texas 

274579923

What you will be doing:

• You will play a major role analyzing the design and driving fixes as well as developing, maintaining, and improving our Lint, Clock Domain Crossing (CDC), Reset Domain Crossing (RDC) and Static Timing Analysis (STA) constraints and methodology for our DPUs and SOCs across block level, cluster level, and/or full chip level.

• Responsibility for analyzing and optimizing the CDC and RDC sign-offs for DPUs and SOCs.

• Develop and maintain key CDC/STA checks and associated sign-offs for DPUs and SOCs.

• Help in driving frontend and backend assertions needed to support CDC/RDC/STA constraints and assumptions.

What we need to see:

• Great teammate

• BS (or equivalent experience) in Electrical or Computer Engineering

• Minimum 5+ years experience or MS (or equivalent experience) with 4 years experience in Synthesis and Timing.

• Expertise in Static Timing Analysis (STA), Clock-Domain Crossing (CDC), and Reset Domain Crossing (RDC) solutions.

• Experience in critical path planning and crafting needed solutions.

• Power user of tools like Synopsys PrimeTime, Spyglass, VC-Static, or Meridian

• Solid experience in full-chip/sub-chip Static Timing Analysis (STA), timing constraints generation and management, and timing convergence.

• Proficiency in Python, Tcl and Make for automation and scripting tasks.