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Apple Senior Verification Engineer Vietnam, Hanoi 237560751
06.06.2024
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Key Qualifications
- +6 years experience in SoC Verification.
- You will need to have advanced knowledge of SoC architecture/design, in-depth knowledge of verification flows and broad system view.
- Expected to have a deep understanding and shown experience in advanced verification processes, including dynamic, coverage based and formal methods.
- Extensive experience with SystemVerilog or UVM.
- Experience with verification infrastructure development.
- Knowledge of formal, hardware acceleration – an advantage.
- Scripting and programming experience using several of the following: Perl, Python, Verilog, SystemVerilog, C, C++, and TCL – an advantage.
Education & Experience
B.Sc / M.Sc in Electrical or Computer Engineering
Additional Requirements
- Apple is an Equal Opportunity Employer that is committed to inclusion and diversity. We take affirmative action to ensure equal opportunity for all applicants without regard to race, color, religion, sex, sexual orientation, gender identity, national origin, disability, veteran status, or other legally protected characteristics. If you’d like more information about your EEO rights as an applicant, please click here. Apple will not discriminate or retaliate against applicants who inquire about, disclose, or discuss their compensation or that of other applicants. For more information, please click here.
- Apple participates in the E-Verify program in certain locations as required by law. Learn more.
- Apple's committed to working with and providing reasonable accommodation to applicants with physical and mental disabilities. Learn more.
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