Writing test plans, defining test methodologies, completing functional verification to the required quality levels and schedules
Working with project management and leads on planning tasks, setting schedules, and quality checkpoints.
Collaborate with engineers from other teams including architecture, design, implementation, modelling, performance analysis, silicon validation, FPGA and board development
Principal Engineers are also encouraged to mentor junior members
Required Skills and Experience :
Worked on embedded C/C++ based SoC verification environments
Knowledge of assembly language (preferably ARM), C/C++ and/or hardware verification languages e.g. (SystemVerilog), shell programming/scripting (g. Tcl, Perl, Python etc.)
Experienced in one or more of various verification methodologies – UVM/OVM, formal, low power, emulation
Familiar with all stages of verification: requirements collection, creation of verification methodology plans, test plans, testbench implementation, test case development, documentation and support
Practical experience of verifying on processor based system designs
Excellent presentation and interpersonal skills with a proven ability to communicate complex technical concepts with different audiences, including technical team members, partners and customers
“Nice To Have” Skills and Experience :
Understanding of the fundamentals of Arm system architectures
Power aware and Clock Domain Crossing implementation
Experience in embedded operating systems, device drivers, microprocessor and embedded system hardware architectures.
Experience verifying subsystems for PCIe, LPDDR, HBM, UCIe, Ethernet
Development and deployment of large SoCs on emulation platforms