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Apple SOC Design Test Engineer m/f/d Germany, Bavaria, Munich 179522731
12.12.2024
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Minimum Qualifications
- • We are counting on your expertise and knowledge about industrial standards and practices in DfT, including ATPG, JTAG, MBIST and trade-offs between test quality and test time
- • You have experience developing DfT specifications and driving DfT architecture and methods for designs
- • You are confident with Verilog and / or VHDL, and have experience with simulators and waveform debugging tools
- • By now you are demonstrating proven understanding of design verification (DV) methodologies for validating DfT implementation in simulation pre-silicon
- • You can debug ATPG patterns, compressed ATPG patterns, MBIST, and JTAG/1500 related issues
Preferred Qualifications
- You have experienced with STA constraints development and analysis for DfT modes and SDF simulations
- • You love conducting experiments during silicon debug, capturing and analyzing data; and utilize scripting to support efficient handling of ATE data
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