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Apple Design Verification Engineer Cellular SoC m/f/d Germany, Bavaria, Munich 866144347
28.03.2024
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Key Qualifications
- Experience in taping out SoC systems with embedded processor cores and hands-on verification experience in UVM environments.
- Strong collaborative work with system, design, and firmware teams.
- Knowledge of assertion-based verification would be nice to have
- Verification and Validation mindset as well as outstanding sense and drive for quality of deliverables
- A detective skill for finding bugs and weaknesses
- System know-how in the cellular RF transceiver domain is a plus
- Having a good view of the definition and design process of a chip
- Holistically thinking beyond the design verification domain boundaries
- Ideally, you worked on: system/IP definition, system/IP validation, system/IP design system/IP testing, or similar
- Good interpersonal and communication skills
- English language proficiency is required for this position
Description
You will need a fundamental understanding of HW and SW design as well as the eagerness to do hands-on verification. The cool thing is, once you crack the design verification world, it will potentiate your knowledge of HW/SW systems in the RF world. We will introduce you to assertion-based verification, simulation acceleration, and formal methods. You will learn special verification languages as universal verification methodology (UVM) or formal description languages, like SVA flanked by AI-based approaches. Our team is a very strong cellular hardware design verification team with very good individual communication. You will work in a strong team setup with a lot of interpersonal interaction that will help you to get a very wide understanding of our work as well as the sub-system and system integration into RF modems.
Education & Experience
A bachelor’s or master's degree in electrical engineering, computer engineering/science, or equivalent is required.
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