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Job Area:
Engineering Group, Engineering Group > Hardware Engineering
Responsibilities
* NOT A LAYOUT POSITION*
Job responsibilities for this position includeand working closely with PMIC IC designers and Test HW platform teams for optimizing performance and cost on test hardware platforms.(by working closely with CAD engineer) based on interaction with chipset architecture, chip design and test teams. Experience in Mentor PADs Logic and PADs Layout, DxDesigner and Expedition is desirable but not essential.(based on Power Integrity and Signal Integrity tools) to review and sign off on hardware designs developed by various test teams. The engineer will be responsible forpublishing performance and cost optimized reference BOMlists (power inductors, capacitors, third party components etc) based on component characterization and BOM reduction and optimization tests in lab.
* NOT A LAYOUT POSITION*
Understanding and ability to apply electrical engineering concepts and circuit solving skills.(oscilloscope, spectrum analyzer, logic analyzer, network and impedance analyzer, etc.).including CAD interface. Experience in high layer count multilayer boards (6/8/10 layers) preferred. Good understanding of commonSignal and Power Integrityissues on test hardware and ability to identify and provide alternate solutions using Signal and Power Integrity simulators (eg. powerSI, SIWave, Ansys) is also a plus.
It is important the candidate hastechnical understandings and project status clearly. Also important is the ability tothoroughly and
follow required procedures and methodologies. Ability to contribute seamlessly as a member of the reference HW design team across multiple chipsets.
Required: B.E/ M.Tech /MS with 1 to 4 years of relevant experience.
PMIC Reference Board Design, Power Electronics, PCB Design, Power Delivery, Power Integrity
Minimum Qualifications:
• Bachelor's degree in Science, Engineering, or related field and 2+ years of ASIC design, verification, validation, integration, or related work experience.
Master's degree in Science, Engineering, or related field and 1+ year of ASIC design, verification, validation, integration, or related work experience.
PhD in Science, Engineering, or related field.
Qualcomm expects its employees to abide by all applicable policies and procedures, including but not limited to security and other requirements regarding protection of Company confidential information and other confidential and/or proprietary information, to the extent those requirements are permissible under applicable law.
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