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Intel Senior IP Logic Design Engineer United States, Texas 118803050
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Who You Are
Your responsibilities include but not limited to:
Defines, documents and designs the microarchitecture of IP blocks and subsystems
Owns the register transfer level (RTL) development for the IP block and implements the specification for logic components
Ensures quality of design through clean design partitioning, clear microarchitectural documentation, reviewing RTL design and verification of features
Applies various strategies, tools and methods to write RTL and optimize logic to qualify the design to meet power, performance, area, and timing goals
Delivers microarchitecture specifications (MAS) document along with detailed clear block diagram, signal level description, clocking details, power and timing requirements to capture the implementation details and ensure correct interactions between blocks or Ips
Reviews the verification plan and implementation to ensure design features are verified correctly and implements corrective measures for failing RTL tests to ensure correctness of features
Supports SoC customers to ensure high quality integration and verification of the IP block
Drives quality assurance compliance for smooth IP to SoC handoff
Supports post-silicon activity to enable various features
Good problem-solving ability
Excellent technicalleadership/teamwork/communicationskills and a proven ability to work with dynamic schedules
You must possess the below minimum education requirements and minimum required qualifications to be initially considered for this position. Relevant experience can be obtained through schoolwork, classes, project work, internships, and/or military experience. Additional preferred qualifications are in addition to the minimum requirements and are considered a plus factor in identifying top candidates.Minimum Qualifications
Candidate should possess a Bachelor's Degree with at least 4+ years of relevant experience in chip design with familiarity of the entire development flow from definition to tape-out – OR - Master's Degree in Electrical, Electronics or Computer Engineering with at least 3+ years of relevant experience in chip design with familiarity of the entire development flow from definition to tape-out
Knowledge of processor architecture, server hardware/software, and high-speed serial link protocols
Expertise in System Verilog/OVM or UVM methodology and/or Formal Verification techniques
Preferred Qualifications
System simulation models and debugging RTL/tests
Experience in High-speed serial link protocols/IPs (PCIe, UPI, CXL, IOMMU etc)
Experience in Computer architecture and PCIe, UPI, CXL, IOMMU, Cache Coherency protocols.
Experience in authoring Functional Specifications
Position of Trust
offer a total compensation package that ranks among the best in the industry. It consists of competitive pay, stock, bonuses, as well as, benefit programs which include health, retirement, and vacation. Find more information about all of our Amazing Benefits here:
Annual Salary Range for jobs which could be performed in the US:
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