Cisco Hardware Engineering Architect 

United States, California, San Jose 

115304323

The application window is expected to close on 6/02/2025.

Job posting may be removed earlier if the position is filled or if a sufficient number of applications are received.

This role requires the employee to work onsite at the San Jose office location.

• Become a member of the hardware architecture team at Cisco Silicon One, focusing on advanced modeling and simulation.
• Your contribution will be at the center of the entire chip design process, enhancing simulation accuracy, performance, and multi-functional collaboration.
• Define hardware feature specifications and develop their behavioral models
• Present device features and architecture to internal and external customers and capture requirements for next-generation devices.
• Guide the ASIC design and verification teams through the development process, including uArch, design, and verification reviews.
• Collaborate with software teams to bring up and enable new features on future devices.

• Bachelor's or Master's degree in Electrical Engineering, Computer Science, or a related disciplines with 10+ years in ASIC development
• 5+ years' experience with digital design.
• 5+ years' experience with ASIC architecture
• Experience with networking protocols like Ethernet, IP, MPLS, VxLAN, and more.

• Experience with modeling and simulation, particularly for digital hardware systems
• Experience with TLM (Transaction-Level Modeling) and other modeling standards.
• Experience with C++ or System C.
• Collaborative mindset, with meticulous attention to detail and problem-solving abilities.
• Familiarity with design verification concepts and methodologies