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Nvidia Senior ASIC Design Engineer 
China, Shanghai 
11216910

31.07.2024

What you'll be doing:

  • Micro-architecture definition for System-level modules (Fuse, Strap, , Floorsweep, In-silicon measurement, Reset, Sysctrl, etc…)

  • RTL design, synthesis, timing and silicon bring-up

  • Chip level integration

What we need to see:

  • BS / MS in electrical / computer engineering and related

  • At least 5 years ASIC frontend design experience

  • Understand frontend ASIC design flow including RTL design, synthesis and timing analysis

  • Excellent analytical and problem solving skills

  • Broad knowledge with Graphics techniques, SOC architecture and Computer architecture is a big plus

  • Strong programming skills in C/C++, Perl and Python is appreciated as a plus

  • Fluent English (both written and spoken) and excellent communication skills

  • Good team work spirit, easy to cooperate with team members