Soc Architect Memory Subsystem Principal Engineer jobs at Samsung in United States, San Jose

Role and Responsibilities

We are seeking a highly skilled GPU ML Architect to join our GPU Architecture hardware team. As a GPU ML Architect, you will be responsible for designing and developing innovative machine learning (ML) solutions for graphics processing units (GPUs). While knowledge of graphics or GPU architecture is not a requirement, a strong understanding of compute architectures and machine learning principles is essential. You will work closely with cross-functional teams to analyze workloads, model performance, and create new features for large vision models and image classification applications.

• You write technical specifications for new ML features and architectures, ensuring they integrate seamlessly with the graphics pipeline and meet performance, power, and functionality requirements.
• You work on improving middleware to enhance the overall performance and efficiency of ML workloads on GPUs.
• You create new hardware features and optimizations to improve PPA on ML applications such as LLMs, LVMs, Image Classification, etc.
• You integrate with the graphics pipeline team to ensure that ML solutions are aligned with the overall graphics architecture.
• You optimize GPU architectures for ML workloads, ensuring maximum performance and power efficiency.
• Collaborate with engineers to analyze and model workloads, identifying performance bottlenecks and areas for optimization.

Skills and Qualifications

• 15+ years of experience with a Bachelor’s degree in Computer Science/Computer Engineering/relevant technical field, or 13+ years of experience with a Master’s degree, or 11+ years of experience with a PhD
• Strong understanding of machine learning principles and architectures
• Experience with compute architectures and performance optimization
• Experience with workload analysis and modeling
• Excellent programming skills in languages such as C++, Python, or similar
• Familiarity with LLMs, LVMs, and image classification
• GPU architecture and graphics pipeline experience is a big plus
• Knowledge of ML frameworks and tools (e.g., TensorFlow, PyTorch) preferred
• Ability to write clear and concise technical specifications
• Strong analytical and problem-solving skills

U.S. Export Control

This position requires the ability to access information subject to U.S. export control restrictions. Applicants must have the ability to access export-controlled information or be eligible to receive a government authorization to access export-controlled information.

Role and Responsibilities

As a GPU RTL Design Engineer, you will work as part of a GPU IP design team. This is a mid to senior level position where you will act as an individual contributor tasked with driving the RTL design of various sub-blocks for a GPU targeted to mobile market. Significant architectural, as well as RTL design experience, is critical for success.

• You engage with other architects within the IP and at the SoC level to drive the architectural definition
• You partner with the physical design team to resolve implementation level details
• You work closely with design verification to test plan and otherwise ensure proper functionality
• You expect to collaborate with engineers in Korea on requirements
• You deliver quality micro-architectural level documentation
• You produce quality RTL on schedule meeting PPA goals

Skills and Qualifications

• 10+ years of experience with a Bachelor’s degree in Computer Science/Computer Engineering/relevant technical field, or 8+ years of experience with a Master’s degree, or 6+ years of experience with a PhD.
• Experience driving the RTL design of various digital sub-blocks of GPU /CPU high performance digital designs
• Demonstrated experience of successful Architectural through RTL design experience on high performance digital designs
• Good written and verbal communication skills
• Computer graphics and computer architecture background is highly preferred
• Low Power Design experience is a plus

With architecture scalability at the frontier of our design focus, our performance- and power-optimized IP solution gets integrated into complex semiconductor products, aiming to reach multiple market segments.

U.S. Export Control

This position requires the ability to access information subject to U.S. export control restrictions. Applicants must have the ability to access export-controlled information or be eligible to receive a government authorization to access export-controlled information.

Role and Responsibilities

We’re seeking a highly experienced and skilled SoC Architect to lead the design and development of coherent interconnect architectures for next-generation System-on-Chip (SoC) products. As a key member of our SoC Architecture team, you will be responsible for defining and implementing innovative, high-performance, and low-power interconnect solutions that enable seamless communication between various IP blocks and subsystems within our SoCs.

• You provide technical leadership and expertise in the design and development of coherent interconnect architectures, including cache coherence protocols, network-on-chip (NoC) designs, and high-speed interface protocols (e.g., AXI, ACE, CHI etc.).
• You collaborate with cross-functional teams to define and optimize SoC architectures, ensuring that interconnect designs meet system performance, power, and area requirements.
• You lead the development of interconnect IP blocks, including specification, design, verification, and validation of coherent interconnect protocols and NoC fabrics.
• You analyze and optimize interconnect performance, power consumption, and area efficiency using simulation tools, modeling, and benchmarking.
• You work closely with various stakeholders, including system architects, IP designers, and software teams to ensure seamless integration of interconnect IP into SoC designs.
• You contribute to the development of technical roadmaps for coherent interconnect architectures, aligned with Samsung's strategic goals and industry trends.
• You mentor junior engineers and share knowledge and expertise with the team to ensure skill growth and expertise development.

Skills and Qualifications

• 15+ years of experience with a Bachelor’s degree in Computer Science/Computer Engineering/relevant technical field, or 13+ years of experience with a Master’s degree, or 11+ years of experience with a PhD.
• 15+ years of experience in SoC architecture, interconnect design, or related fields, with a focus on coherent interconnect architectures.
• In-depth knowledge of:
  • Cache coherence protocols (e.g., MESI, MOESI, etc.)
  • Network-on-chip (NoC) designs and protocols (e.g., AXI, ACE, CHI etc.)
  • High-speed interface protocols (e.g., PCIe, USB, etc.)
  • Interconnect IP design and development
  • System-level design and optimization
• Proficiency in programming languages such as C, C++, Python, and Verilog/VHDL.
• Proven experience in technical leadership, collaboration, and communication with cross-functional teams.
• Strong understanding of industry trends and standards in SoC architecture, interconnect design, and related technologies.

With architecture scalability at the frontier of our design focus, our performance- and power-optimized IP solution gets integrated into complex semiconductor products, aiming to reach multiple market segments.

Being part of a new team of talented individuals with vastly diverse backgrounds and skill sets at a well-established global company means you have limitless room to explore, innovate, and expand role responsibilities to build technical expertise. With a big charter ahead, we get to do challenging work and solve unique problems in a highly collaborative and supportive environment. You will always be learning while helping us shape the team’s culture.

U.S. Export Control

This position requires the ability to access information subject to U.S. export control restrictions. Applicants must have the ability to access export-controlled information or be eligible to receive a government authorization to access export-controlled information.

Role and Responsibilities

We are seeking a highly skilled Graphics Core Performance Verification (GCPV) Engineer to join our team at Samsung SARC/ACL. As a GCPV Engineer, you will play a critical role in ensuring the performance of our GPU designs meet the required specifications and standards. You will be responsible for pre-silicon performance verification, developing tests to characterize GPU performance, and collaborating with cross-functional teams to analyze, correlate, and compare performance across different platforms. The ideal candidate will have a passion for graphics processing and a strong background in performance verification.

• You architect, develop and execute comprehensive performance verification strategies to ensure that GPU designs meet performance targets and requirements
• You design and implement necessary tool/test environments, test content, and verification flows to verify design performance, including developing and maintaining performance benchmarks and tests
• You work closely with the Architecture and Modeling teams to define design targets, ensure alignment with performance requirements, and provide feedback on design trade-offs
• You analyze and correlate performance data across silicon, emulation, and architectural models
• You identify and prioritize performance optimization opportunities
• You participate in the debug of failures in silicon and develop new testing strategies to detect these failures on pre-silicon models, working closely with Architecture and RTL teams to identify and resolve performance issues
• You communicate effectively with Architecture, RTL, and other cross-functional teams to ensure seamless collaboration, coordinate performance verification activities, and provide regular progress updates

Skills and Qualifications

• 10+ years of experience with a Bachelor’s degree in Computer Science/Computer Engineering/relevant technical field, or 8+ years of experience with a Master’s degree, or 6+ years of experience with a PhD
• Proven experience in pre-silicon performance verification, architecting and driving PV strategy and execution
• Strong understanding of GPU architecture and design, graphics processing, and performance optimization techniques
• Experience with performance verification methodologies, tools, and languages
• Familiarity with performance analysis and optimization tools (e.g., GPU profiling tools, performance modeling frameworks)
• Excellent communication and collaboration skills, with ability to work effectively in a cross-functional team environment
• Strong problem-solving and analytical skills, with ability to debug complex performance issues

U.S. Export Control

This position requires the ability to access information subject to U.S. export control restrictions. Applicants must have the ability to access export-controlled information or be eligible to receive a government authorization to access export-controlled information.

Role and Responsibilities

A successful candidate will have a strong hardware background, hands-on experience with Linux Kernel, a strong understanding of complex Kernel-mode driver (KMD) debugging, and expertise in driver frameworks.

• You are a domain expert in more than one area. You are skilled at designing, developing, and maintaining high-quality device drivers for GPU products, including Kernel-mode drivers, user-mode drivers, and firmware.

• You have a collaborative mindset and excel at building cross-functional partnerships with hardware engineering and system architecture teams to develop software solutions that optimize performance, power efficiency, and functionality based on GPU architecture, while ensuring seamless integration with various operating systems, including Linux and Android.

• You are an innovator. You enjoy analyzing and optimizing device driver performance, and identifying and addressing bottlenecks to ensure maximum throughput and efficiency.

• You take ownership in delivering high-quality results by debugging and troubleshooting complex issues related to device drivers, working closely with internal teams and external partners to resolve problems quickly and efficiently.

• You are a lifelong learner. You stay up-to-date with industry trends, standards, and emerging technologies, applying new knowledge to improve our GPU products and device drivers.

Skills and Qualifications

• 10+ years of experience with a Bachelor's Degree in Computer Science, Computer Engineering, or comparable field, or 8+ years of experience with a Master’s Degree, or 6+ years of experience with a Ph.D.

• 10+ years of experience in software engineering using C, C++, and scripting languages (e.g., Python, Bash).

• Hands-on experience with new silicon bring-ups on emulation platforms.

• Familiarity with GPU architecture, including graphics rendering, compute, and memory management.

• Experience with device driver development frameworks, such as Linux Kernel or Android Driver Framework, is must.

• Technical expertise on Linux DRM subsystem.

• Strong understanding of operating system concepts, including process management, memory management, and interrupt handling.

• Excellent problem-solving skills, with the ability to analyze complex issues and develop creative solutions.

• Debugging complex KMD issues which involves understanding of the software stack and debugging tools.

• Strong communication and collaboration skills, with experience working with cross-functional global teams and external partners.

At SARC/ACL, you will work alongside a diverse global task force with cross-functional impact, contributing to multiple stages of the technology development cycle and seeing your work in real-world products. Here your bold ideas are encouraged, learning always happens, and teamwork fuels our innovation.

Total Rewards

This is an exempt position, which is not eligible for overtime pay under the Fair Labor Standards Act (FLSA).

U.S. Export Control

This position requires the ability to access information subject to U.S. export control restrictions. Applicants must have the ability to access export-controlled information or be eligible to receive a government authorization to access export-controlled information.

Role and Responsibilities

We are seeking a highly skilled GPU Performance Architect (PPA) to analyze, verify, and optimize the performance of our GPU system, identifying bottlenecks, prototyping and proposing solutions to improve end-to-end performance. You will be responsible for executing and analyzing performance of our GPU, including, but not limited to, shader-level analysis, pipeline optimization, system-level performance characterization, verification and prototyping, using programming languages such as C/C++ and Python, and leveraging tools such as waveform level debugging tools (e.g. Synopsys Verdi) and cycle approximate performance model.

• You have a strong background in GPU architecture, performance analysis, and verification, with experience in waveform level debugging and RTL debugging.
• You have a good understanding of the entire GPU system, with a focus on performance analysis, verification, and optimization.
• You develop tools to analyze performance data, identify bottlenecks, and propose solutions to improve end-to-end performance of the GPU system
• You do prototyping works based on performance models and RTL, analyze the results and propose GPU hardware optimizations.
• You debug RTL code, including simulation, waveform analysis, andidentifying/correctingfunctional errors to ensure correct implementation of GPU architecture.
• You verify and validate the performance of a GPU core, ensuring it meets the required specifications
• You analyze system performance using various metrics, such as latency, throughput, and power consumption, to identify bottlenecks and optimization opportunities
• You develop and run benchmarks to characterize system performance and identify areas for improvement
• You stay up-to-date with the latest developments in graphics technology, including new APIs, tools, and methodologies

Skills and Qualifications

• 5+ years of experience with a Bachelor’s degree in Computer Science/Computer Engineering/relevant technical field, or 3+ years of experience with a Master’s degree, or 1+ years of experience with a PhD
• Strong background in GPU system level architecture (not limited to a specific block), performance analysis, verification, and optimization
• Understanding of RTL (System Verilog/Verilog) is a must – basic to intermediate level
• Experience with prototyping GPU optimizations is preferred.
• Experience with waveform level debugging tools (e.g., Synopsys Verdi) and RTL debugging
• Proficiency in C/C++ and Python programming languages
• Ability to work on the execution side, with a focus on performance analysis and optimization
• Excellent analytical and problem-solving skills, with the ability to identify bottlenecks and propose solutions to improve performance.
• You are a team player, with excellent communication and collaboration skills, and experience working with cross-functional teams.

• Experience with GPU profiling tools (e.g., RenderDoc, PIX, AMD RGP, Nvidia Nsight) to analyze and optimize graphics performance, power consumption, and system-level interactions
• Knowledge of OpenGL, Vulkan, DX11/12
• Familiarity with mobile platforms

U.S. Export Control

This position requires the ability to access information subject to U.S. export control restrictions. Applicants must have the ability to access export-controlled information or be eligible to receive a government authorization to access export-controlled information.

Role and Responsibilities

Your responsibilities will include the design, development, and verification of SRAM circuits and logic, spanning areas such as SOC memory, logic verification, timing generation, and physical verification. As a successful candidate, you will have a strong background in SRAM circuit and logic design, with at least 5 years of relevant experience, ready to contribute to the success of Samsung’s next-generation IP solutions.

• You are an innovator. You thrive on pushing the boundaries of SRAM circuit and logic design, exploring new technologies and techniques to improve design efficiency, performance, and power consumption. You challenge conventional approaches and drive forward-thinking changes.

• You excel at cross-functional collaboration. You build strong partnerships with software, hardware, and foundry engineers to ensure seamless integration of SRAM circuits and logic into our products.

• You have a curious mindset. You stay up to date with industry trends and emerging technologies, applying new learnings to continuously improve our designs.

• You are self-driven and take ownership. You lead SRAM circuit and logic design projects with accountability, from developing and maintaining technical documentation, to consistently delivering high-quality results and meeting project deadlines.

• You are a domain expert in one or more technical areas. You will provide technical leadership to junior engineers, guiding them with best practices, and mentoring their professional development.

Skills and Qualifications

• 10+ years of experience in SRAM circuit and logic design with a Bachelor’s degree in Computer Science/Computer Engineering/relevant technical field, or 8+ years of experience with a Master’s degree, or 6+ years of experience with a PhD.

• Experience with advanced SRAM circuit and logic design techniques, such as low-power design and high-speed design

• Knowledge of industry-standard SRAM circuit and logic design tools and methodologies

• Experience with scripting languages such as Perl and Python

• Strong understanding of computer architecture and microprocessor design

Total Rewards

This is an exempt position, which is not eligible for overtime pay under the Fair Labor Standards Act (FLSA).

U.S. Export Control

This position requires the ability to access information subject to U.S. export control restrictions. Applicants must have the ability to access export-controlled information or be eligible to receive a government authorization to access export-controlled information.