Principal Soc Architect Ai-centric Memory Subsystem jobs at Samsung in United States, San Jose

Role and Responsibilities

We are seeking a highly skilled GPU ML Architect to join our GPU Architecture hardware team. As a GPU ML Architect, you will be responsible for designing and developing innovative machine learning (ML) solutions for graphics processing units (GPUs). While knowledge of graphics or GPU architecture is not a requirement, a strong understanding of compute architectures and machine learning principles is essential. You will work closely with cross-functional teams to analyze workloads, model performance, and create new features for large vision models and image classification applications.

• You write technical specifications for new ML features and architectures, ensuring they integrate seamlessly with the graphics pipeline and meet performance, power, and functionality requirements.
• You work on improving middleware to enhance the overall performance and efficiency of ML workloads on GPUs.
• You create new hardware features and optimizations to improve PPA on ML applications such as LLMs, LVMs, Image Classification, etc.
• You integrate with the graphics pipeline team to ensure that ML solutions are aligned with the overall graphics architecture.
• You optimize GPU architectures for ML workloads, ensuring maximum performance and power efficiency.
• Collaborate with engineers to analyze and model workloads, identifying performance bottlenecks and areas for optimization.

Skills and Qualifications

• 15+ years of experience with a Bachelor’s degree in Computer Science/Computer Engineering/relevant technical field, or 13+ years of experience with a Master’s degree, or 11+ years of experience with a PhD
• Strong understanding of machine learning principles and architectures
• Experience with compute architectures and performance optimization
• Experience with workload analysis and modeling
• Excellent programming skills in languages such as C++, Python, or similar
• Familiarity with LLMs, LVMs, and image classification
• GPU architecture and graphics pipeline experience is a big plus
• Knowledge of ML frameworks and tools (e.g., TensorFlow, PyTorch) preferred
• Ability to write clear and concise technical specifications
• Strong analytical and problem-solving skills

U.S. Export Control

This position requires the ability to access information subject to U.S. export control restrictions. Applicants must have the ability to access export-controlled information or be eligible to receive a government authorization to access export-controlled information.

Role and Responsibilities

We’re seeking a highly experienced and skilled SoC Architect to lead the design and development of coherent interconnect architectures for next-generation System-on-Chip (SoC) products. As a key member of our SoC Architecture team, you will be responsible for defining and implementing innovative, high-performance, and low-power interconnect solutions that enable seamless communication between various IP blocks and subsystems within our SoCs.

• You provide technical leadership and expertise in the design and development of coherent interconnect architectures, including cache coherence protocols, network-on-chip (NoC) designs, and high-speed interface protocols (e.g., AXI, ACE, CHI etc.).
• You collaborate with cross-functional teams to define and optimize SoC architectures, ensuring that interconnect designs meet system performance, power, and area requirements.
• You lead the development of interconnect IP blocks, including specification, design, verification, and validation of coherent interconnect protocols and NoC fabrics.
• You analyze and optimize interconnect performance, power consumption, and area efficiency using simulation tools, modeling, and benchmarking.
• You work closely with various stakeholders, including system architects, IP designers, and software teams to ensure seamless integration of interconnect IP into SoC designs.
• You contribute to the development of technical roadmaps for coherent interconnect architectures, aligned with Samsung's strategic goals and industry trends.
• You mentor junior engineers and share knowledge and expertise with the team to ensure skill growth and expertise development.

Skills and Qualifications

• 15+ years of experience with a Bachelor’s degree in Computer Science/Computer Engineering/relevant technical field, or 13+ years of experience with a Master’s degree, or 11+ years of experience with a PhD.
• 15+ years of experience in SoC architecture, interconnect design, or related fields, with a focus on coherent interconnect architectures.
• In-depth knowledge of:
  • Cache coherence protocols (e.g., MESI, MOESI, etc.)
  • Network-on-chip (NoC) designs and protocols (e.g., AXI, ACE, CHI etc.)
  • High-speed interface protocols (e.g., PCIe, USB, etc.)
  • Interconnect IP design and development
  • System-level design and optimization
• Proficiency in programming languages such as C, C++, Python, and Verilog/VHDL.
• Proven experience in technical leadership, collaboration, and communication with cross-functional teams.
• Strong understanding of industry trends and standards in SoC architecture, interconnect design, and related technologies.

With architecture scalability at the frontier of our design focus, our performance- and power-optimized IP solution gets integrated into complex semiconductor products, aiming to reach multiple market segments.

Being part of a new team of talented individuals with vastly diverse backgrounds and skill sets at a well-established global company means you have limitless room to explore, innovate, and expand role responsibilities to build technical expertise. With a big charter ahead, we get to do challenging work and solve unique problems in a highly collaborative and supportive environment. You will always be learning while helping us shape the team’s culture.

U.S. Export Control

This position requires the ability to access information subject to U.S. export control restrictions. Applicants must have the ability to access export-controlled information or be eligible to receive a government authorization to access export-controlled information.

Role and Responsibilities

We are seeking a highly skilled GPU Performance Architect (PPA) to analyze, verify, and optimize the performance of our GPU system, identifying bottlenecks, prototyping and proposing solutions to improve end-to-end performance. You will be responsible for executing and analyzing performance of our GPU, including, but not limited to, shader-level analysis, pipeline optimization, system-level performance characterization, verification and prototyping, using programming languages such as C/C++ and Python, and leveraging tools such as waveform level debugging tools (e.g. Synopsys Verdi) and cycle approximate performance model.

• You have a strong background in GPU architecture, performance analysis, and verification, with experience in waveform level debugging and RTL debugging.
• You have a good understanding of the entire GPU system, with a focus on performance analysis, verification, and optimization.
• You develop tools to analyze performance data, identify bottlenecks, and propose solutions to improve end-to-end performance of the GPU system
• You do prototyping works based on performance models and RTL, analyze the results and propose GPU hardware optimizations.
• You debug RTL code, including simulation, waveform analysis, andidentifying/correctingfunctional errors to ensure correct implementation of GPU architecture.
• You verify and validate the performance of a GPU core, ensuring it meets the required specifications
• You analyze system performance using various metrics, such as latency, throughput, and power consumption, to identify bottlenecks and optimization opportunities
• You develop and run benchmarks to characterize system performance and identify areas for improvement
• You stay up-to-date with the latest developments in graphics technology, including new APIs, tools, and methodologies

Skills and Qualifications

• 5+ years of experience with a Bachelor’s degree in Computer Science/Computer Engineering/relevant technical field, or 3+ years of experience with a Master’s degree, or 1+ years of experience with a PhD
• Strong background in GPU system level architecture (not limited to a specific block), performance analysis, verification, and optimization
• Understanding of RTL (System Verilog/Verilog) is a must – basic to intermediate level
• Experience with prototyping GPU optimizations is preferred.
• Experience with waveform level debugging tools (e.g., Synopsys Verdi) and RTL debugging
• Proficiency in C/C++ and Python programming languages
• Ability to work on the execution side, with a focus on performance analysis and optimization
• Excellent analytical and problem-solving skills, with the ability to identify bottlenecks and propose solutions to improve performance.
• You are a team player, with excellent communication and collaboration skills, and experience working with cross-functional teams.

• Experience with GPU profiling tools (e.g., RenderDoc, PIX, AMD RGP, Nvidia Nsight) to analyze and optimize graphics performance, power consumption, and system-level interactions
• Knowledge of OpenGL, Vulkan, DX11/12
• Familiarity with mobile platforms

U.S. Export Control

This position requires the ability to access information subject to U.S. export control restrictions. Applicants must have the ability to access export-controlled information or be eligible to receive a government authorization to access export-controlled information.

Role and Responsibilities

We are looking for a seasoned GPU Architect to drive the design and development of our future GPU architectures. The successful candidate will possess a deep understanding of graphics and GPGPU pipelines, hardware design, and computer architecture, with a proven track record of delivering high-performance, power-efficient, and scalable GPU designs.

• You define, develop, and implement GPU architectures for next-generation products, including technical specifications, block diagrams, and micro-architectural designs
• You own the design and optimization of GPU architectures for performance, power, and area, considering emerging applications and use cases
• You participate in the development of technical roadmaps, product planning, and strategic decisions related to GPU architecture
• You collaborate with cross-functional teams to ensure seamless integration of the GPU into the overall system
• You stay up-to-date with industry trends, competitor architectures, and emerging technologies, such as ray tracing, AI, and machine learning

Skills and Qualifications

• 15+ years of experience with a Bachelor’s degree in Computer Science/Computer Engineering/relevant technical field, or 13+ years of experience with a Master’s degree, or 11+ years of experience with a PhD.
• 10+ years of experience in GPU architecture, design, or development, with a focus on high-performance, low-power designs
• Strong understanding of graphics and GPGPU pipelines, hardware design, and computer architecture
• Knowledge of emerging technologies, such as ray tracing, AI, and machine learning
• Experience with CPU, NPU, or other complex processing units, such as ARM, x86, or RISC-V is nice to have
• Experience in performance modeling, analysis and optimization is a plus
• Strong analytical and problem-solving skills, with the ability to analyze complex systems and optimize performance, power, and area
• Excellent communication and collaboration skills, with the ability to work effectively with cross-functional teams

U.S. Export Control

This position requires the ability to access information subject to U.S. export control restrictions. Applicants must have the ability to access export-controlled information or be eligible to receive a government authorization to access export-controlled information.

Role and Responsibilities

As a SoC Architect, Memory Subsystem, you will drive the definition of SoC memory and cache subsystems for next-generation mobile products with a heavy focus on supporting On-Device ML.

This is a senior technical lead role, you will identify and analyze emerging use cases, as well as, proposing new and innovative SoC memory architectures to efficiently support them. Your solid background in architecture foundation, detailed knowledge of cache hierarchy, memory subsystem, and SoC architecture are desired for success. You are empowered to experiment with new ideas while contributing to impactful ongoing deliverables and broadening your knowledge of whole SoC design.

• You are passionate about identifying, proposing, and delivering new SoC architecture and architecture features for products in new and existing markets – particularly around smartphone and mobile platforms.
• You enjoy performing high-level performance modeling and analysis of hardware features, applications, benchmarks, and complex uses cases.
• You are a domain expert in one or more technical areas. You understand and can analyze the impact of system-level architectural trade-offs (including CPU, GPU, NPU, ISP, memory subsystems, and system software).
• You are highly analytical and can leverage a data-driven approach to drive consensus around complex architectural proposals.
• You are skilled at creating necessary simulation/analysis tools to evaluate complex memory subsystem use cases such as gaming and camera use cases.
• You excel at delivering architecture proposals and specifications to the design team.
• You thrive on driving cross-company collaboration by communicating and articulating architecture proposals clearly and effectively, across audiences ranging from hardware software engineers to architecture community peers, and to technology leadership.

Skills and Qualifications

• 15+ years of experience with a Bachelor’s Degree in Computer Science/Engineering, or 13+ years of experience with a Master’s Degree, or 11+ years of experience with a PhD
• Extensive experience in architecture analysis and performance modeling, ranging from simple analytical models to complex cycle accurate performance model and correlation, especially around CPU – memory subsystems
• High proficiency in leveraging existing simulation capabilities or create new simulation capabilities where necessary
• Detailed knowledge of ODML for LLM as well as traditional CPU/GPU/NPU ML acceleration a big plus
• Detailed knowledge of cache subsystems including caching policies and understanding the tradeoffs of latency, bandwidth and hierarchies
• Detailed knowledge of memory subsystem design to include existing/emerging JEDEC memory standards
• Knowledge of in Interconnect and bus protocols – CHI/ACE interconnect experience preferred
• Strong written and verbal communication skills
• Knowledge of high performance, high efficiency design
• Experience with the Android Ecosystem and analysis tools is a plus
• Experience with Arm Architecture and ecosystem is a plus

With architecture scalability at the frontier of our design focus, our performance- and power-optimized IP solution gets integrated into complex semiconductor products, aiming to reach multiple market segments.

Being part of a new team of talented individuals with vastly diverse backgrounds and skill sets at a well-established global company means you have limitless room to explore, innovate, and expand role responsibilities to build technical expertise. With a big charter ahead, we get to do challenging work and solve unique problems in a highly collaborative and supportive environment. You will always be learning while helping us shape the team’s culture.

U.S. Export Control

This position requires the ability to access information subject to U.S. export control restrictions. Applicants must have the ability to access export-controlled information or be eligible to receive a government authorization to access export-controlled information.

Role and Responsibilities

As a Principal SoC Architect (AI-centric Memory Subsystem), you will drive the definition of SoC memory and cache subsystems for next-generation mobile products with a heavy focus on supporting On-Device ML.

This is a senior technical lead role, you will identify and analyze emerging use cases, as well as, proposing new and innovative SoC memory architectures to efficiently support them. Your solid background in architecture foundation, detailed knowledge of cache hierarchy, memory subsystem, and SoC architecture are desired for success. You are empowered to experiment with new ideas while contributing to impactful ongoing deliverables and broadening your knowledge of whole SoC design. This position can be located in Austin, TX, San Jose, CA or San Diego, CA.

• You are passionate about identifying, proposing, and delivering new SoC architecture and architecture features for products in new and existing markets – particularly around smartphone and mobile platforms.
• You enjoy performing high-level performance modeling and analysis of hardware features, applications, benchmarks, and complex uses cases.
• You are a domain expert in one or more technical areas. You understand and can analyze the impact of system-level architectural trade-offs (including CPU, GPU, NPU, ISP, memory subsystems, and system software).
• You are highly analytical and can leverage a data-driven approach to drive consensus around complex architectural proposals.
• You are skilled at creating necessary simulation/analysis tools to evaluate complex memory subsystem use cases such as gaming and camera use cases.
• You excel at delivering architecture proposals and specifications to the design team.
• You thrive on driving cross-company collaboration by communicating and articulating architecture proposals clearly and effectively, across audiences ranging from hardware software engineers to architecture community peers, and to technology leadership.

Skills and Qualifications

• 15+ years of experience with a Bachelor’s Degree in Computer Science/Engineering, or 13+ years of experience with a Master’s Degree, or 11+ years of experience with a PhD
• Extensive experience in architecture analysis and performance modeling, ranging from simple analytical models to complex cycle accurate performance model and correlation, especially around CPU – memory subsystems
• High proficiency in leveraging existing simulation capabilities or create new simulation capabilities where necessary
• Detailed knowledge of ODML for LLM as well as traditional CPU/GPU/NPU ML acceleration a big plus
• Detailed knowledge of cache subsystems including caching policies and understanding the tradeoffs of latency, bandwidth and hierarchies
• Detailed knowledge of memory subsystem design to include existing/emerging JEDEC memory standards
• Knowledge of in Interconnect and bus protocols – CHI/ACE interconnect experience preferred
• Strong written and verbal communication skills
• Knowledge of high performance, high efficiency design
• Experience with the Android Ecosystem and analysis tools is a plus
• Experience with Arm Architecture and ecosystem is a plus

With architecture scalability at the frontier of our design focus, our performance- and power-optimized IP solution gets integrated into complex semiconductor products, aiming to reach multiple market segments.

Being part of a new team of talented individuals with vastly diverse backgrounds and skill sets at a well-established global company means you have limitless room to explore, innovate, and expand role responsibilities to build technical expertise. With a big charter ahead, we get to do challenging work and solve unique problems in a highly collaborative and supportive environment. You will always be learning while helping us shape the team’s culture.

U.S. Export Control

This position requires the ability to access information subject to U.S. export control restrictions. Applicants must have the ability to access export-controlled information or be eligible to receive a government authorization to access export-controlled information.