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Dram Verification - Memory Team jobs at Samsung in India, Bengaluru
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India
Bengaluru
10 jobs found
20.08.2025
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Samsung DFT Design Engineer - Foundry Team India, Karnataka, Bengaluru
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Scan architecture planning, pin mixing and scan compression planning, optimization for pattern volume for SA and TD pattern sets, scan synthesis, power optimization techniques in test modes. MBIST architecture planning,...
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08.05.2025
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Samsung DRAM Verification - Memory Team India, Karnataka, Bengaluru
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Create new and improve existing verification environment. Apply Universal VerificationMethodology (SystemVerilog/UVM)and define verification plan as well as setup verification metrics in digital environments. Execute tests in these environments on RTL...
08.05.2025
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Samsung SoC RTL Design / SOC Integration - Memory Team India, Karnataka, Bengaluru
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10 to 15 years of work experience in VLSI SoC RTL design. Based on prior skill and desire to learn, the new hire will contribute in either SoC Clock/reset, SoC...
07.05.2025
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Samsung Physical Design Engineer - Foundry Team India, Karnataka, Bengaluru
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Hands on experience doing physical design and timing closure of complex blocks and full-chip designs. Experience in top level floor planning including partition shaping and sizing, pin placement, channel planning,...
07.05.2025
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Samsung Senior Design Verification Engineer India, Karnataka, Bengaluru
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07.05.2025
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Samsung Software -Solution QA - Memory Team India, Karnataka, Bengaluru
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Good understanding and experience in writing C/C++/Python based test script is must. Experience in Compliance & Test Dev, Test Design, Product Engineering, Debug and Trouble shooting, E2E automation & mechanization,...
07.05.2025
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Samsung RTL Micro-Architecture Design Engineer DRAM Controller_TB5-T... India, Karnataka, Bengaluru
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Designing and developing CXL and DRAM controller (DDR4/5) based intellectual property.-Design and Engage with other architects within the IP level to drive the Micro-Architectural definition. Deliverquality micro-architectural level documentation. Producequality...
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Description:Full job details
Scan architecture planning, pin mixing and scan compression planning, optimization for pattern volume for SA and TD pattern sets, scan synthesis, power optimization techniques in test modes. MBIST architecture planning,...
These jobs might be a good fit
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