Principal Engineer - Silicon Packaging Architect jobs at Intel

Job Responsibilities

• Develop and execute comprehensive verification plans to validate CPU logic against architectural specifications.
• Build scalable UVM-based test benches and define robust functional coverage models.
• Run system-level simulations to uncover design bugs and ensure functional integrity.
• Debug and root-cause issues in the pre-silicon environment; implement corrective actions to resolve test failures.
• Collaborate closely with CPU architects and RTL designers to verify complex architectural and microarchitectural features.
• Document verification strategies and lead technical reviews with design and architecture teams.
• Maintain and enhance existing verification infrastructure and methodologies.
• Contribute to the definition and refinement of CPU architecture and microarchitecture features.

Verification Planning & Strategy

• Develop comprehensive verification plans for CPU subsystems including cores, caches, memory controllers, and interconnects.
• Define coverage metrics and verification closure criteria.
• Collaborate with design teams to understand architectural specifications and implementation details.

Test Development & Execution

• Create directed and random test scenarios using SystemVerilog, UVM, and proprietary verification methodologies.
• Develop and maintain testbench infrastructure and verification IP.
• Debug complex functional and timing issues across multiple abstraction levels.
• Execute regression testing and analyze coverage reports.

Methodology & Tools

• Utilize industry-standard EDA tools.
• Implement constrained random verification environments.
• Develop and enhance verification automation scripts and flows.

You must possess the below minimum education requirements and minimum required qualifications to be initially considered for this position. Relevant experience can be obtained through schoolwork, classes, project work, and internships experience. Additional preferred qualifications are in addition to the minimum requirements and are considered a plus factor in identifying top candidates.

Minimum Qualifications

• Bachelor's degree inElectrical/ElectronicsEngineering, Computer Engineeringor in a STEM related field of studywith 3+ years of experience.
• Experience developing SystemVerilog in UVM-based test-benches for reusable and scalable verification environments.
• Experience in scripting language (i.e. Python or Perl).
• Experience in C++.
• Experience implementingvalidation strategies based on architectural and design feature changes.

Preferred Qualifications

• Post Graduate degree inElectrical/ElectronicsEngineering, Computer Engineeringor in a STEM related field of studywith 2+ years of industry experience.
• Solid understanding of digital logic design, including instruction set execution, ALUs, control units, registers, memory, and system buses.
• Experience with Synopsys simulators.
• Experience with agile development methodologies.

Weoffer a total compensation package that ranks among the best in the industry. It consists of competitive pay, stock, bonuses, as well as, benefit programs which include health, retirement, and vacation. Find more information about all of our Amazing Benefits here:

The Applied Machine Learning group is responsible for innovation and development of end-to-end AI solutions, technology proof of concepts, and IP development of current and future ML workloads for Intel architecture and silicon serving consumer and corporate business requirements.

In this position, you will be responsible for research, modeling, prototyping, productizing of ML techniques, generating data insights and optimizations for Intel platforms.

Responsibilities include but are not limited to:

• Builds machine learning based products/solutions, which provide descriptive, diagnostic, predictive, or prescriptive models based on data.
• Uses or develops machine learning algorithms, such as supervised and unsupervised learning, deep learning, reinforcement learning, generative AI, large language model and others, to solve applied problems in various disciplines such as Data Analytics, Computer Vision, Natural Language Processing, Recommendation System, Graph Neural Network, Robotics, etc.
• Interacts with users to define requirements for breakthrough product/solutions.
• In either research environments or specific product environments, utilizes current programming methodologies to translate machine learning models and data processing methods into software.
• Completes programming, testing, debugging, documentation and/or deployment of the solution/products.
• Engineers big data computing frameworks, data modeling and other relevant software tools.
• You will play a key technical role for end-2-end machine learning and deep learning platform development based on various frameworks and hardware (such as CPU, GPU, accelerators).
• You will also be responsible for developing AI ML solutions and methodologies to bring the best performance, accuracy, efficiency, and ease-of-use to customers by working with internal and external partners.

The job scope may include but not limited to:

• End-2-end ML and DL platform component innovation and feature development in data ingestion, feature engineering, distributed training via data and model parallelization, hyper-parameter optimization, neural architecture search, model compression, quantization, distillation, and model serving.
• Algorithm and model development of advanced technologies in computer vision, natural language processing, large language model, recommendation, graph analytics, reinforcement learning, and other domains.
• Machine learning framework and workload performance profiling, optimization, insights generation for benchmark such as MLPerf as well as real-world customer use cases.
• Software and tools development in python, C++, and other languages as required.

Behavioral traits that we are looking for:

• Excellent communication skills.
• Willing to clearly communicate technical details and concept.

Minimum qualifications,you must possess the below minimum qualifications to be initially considered for this position:

• Master´s degree with 4+ years or Ph.D. with 2+ years of experience in: Computer Engineering, Computer Science, Data Science, Software Engineering, Electronic Engineering, Physics, Mathematics, Aerospace engineering, applied mathematics, mechanical engineering, or related STEM disciplines

4+years of the following technical skills:

• Experience in deep learning frameworks such as PyTorch, TensorFlow, working on CPU / GPU / AI accelerators for ML/DL.
• Experience in GenAI frameworks such as transformers, PEFT, diffusers, TGI, TEI, vLLM or SGLang for both training finetuning and inference serving.
• Working with Performance optimization / tuning.
• Experience in computer vision, recommendation, natural language processing, or reinforcement learning.

Preferred qualificationsare in addition to the minimum requirements and are considered a plus factor in identifying top candidates:

• Proven track record of a leadership role in machine learning, deep learning research and applications demonstrated by patents, publications, product delivery, or other means.
• Experience on performance optimization for PyTorch framework, MLPerf benchmark and other SOTA workload.
• Distributed training, DeepSpeed, Torch DDP and FSDP, Ray SGD.
• Inference optimization such as quantization, sparsity, distillation.GenAI end-2-end workflow development and deployment for model serving, RAG and agent system.

Weoffer a total compensation package that ranks among the best in the industry. It consists of competitive pay, stock, bonuses, as well as, benefit programs which include health, retirement, and vacation. Find more information about all of our Amazing Benefits here:

This role requires deep technical expertise in Linux kernel internals, excellent collaboration skills, a proven track record of upstream Linux kernel contributions, and experience with complex, performance-critical systems. We value diverse perspectives and believe that different backgrounds and experiences strengthen our technical solutions. We're committed to fostering an inclusive environment where all team members can contribute their best work. If you're passionate about Linux kernel development and meet most of our qualifications, we'd love to hear from you.

What we offer

• Inclusive team culture with employee resource groups
• Flexible work arrangements and work-life balance support
• Opportunities toexpand expertise acrossdifferent kernel subsystems
• Support for conference attendance, training, and skill development
• Mentorship opportunities both as a mentor and mentee
• Career growth support and clear advancement paths
• Competitive compensation and comprehensive benefits
• Collaborative environment which contributes directly to the improvement of the upstream Linux kernel project

Development & Engineering

• Design, develop,and maintain Linuxkernel features, subsystems, anddevice drivers
• Optimize kernel performance for specific hardware platforms and use cases
• Debug complex kernel issues including crashes, deadlocks, and performance bottlenecks
• Port and adapt kernel code for new hardware architectures and platforms

Technical Leadership

• Share technical knowledge and provide mentorship to team members at all levels
• Conduct code reviews both internally and on public mailing lists and ensure adherenceto Linux kernelcoding standards and quality
• Collaborate with software and hardware teams on specifications and requirements
• Collaborate internallyand externally to drive upstream able system software solutions for our Linux customers
• Participate in architectural decisions for system-level software design

The candidate should exhibit the following behavioral traits:

• Excellent written and verbal communication skills
• Detail-oriented with strong debugging and troubleshooting skills
• Strong commitment to improving the Linux kernel project and healthy open-source development environments
• Strong problem-solving and analytical thinking abilities

Minimum Qualifications

The candidate should have at least one of the following:

• Bachelor’s Computer Science, Electrical Engineering, or related field, plus 8+ years of experience.
• Master’s degree in computer science, Electrical Engineering, or related field, plus 6+ years of experience.
• PHD Computer Science, Electrical Engineering, or related field, plus 4+ years of experience.

The experience listed above should be in the following:

• Linux kernel development experience.
• Experience contributing to upstream Linux kernel or major distributions.
• Experience collaborating with geographically distributed teams across multiple time zones.

Preferred Qualifications

• 10+ years of Linux kernel development experience
• Contributions to multiple kernel subsystems
• Experience mentoring or leading technical teams
• Experience or strong interest in the areas of Intel Architecture, memory management, virtualization, performance and scalability, I/O or device drivers.

Weoffer a total compensation package that ranks among the best in the industry. It consists of competitive pay, stock, bonuses, as well as, benefit programs which include health, retirement, and vacation. Find more information about all of our Amazing Benefits here:

• Lead and manage a team of silicon physical design engineers responsible for end-to-end silicon design engineering activities supporting technology development, and product design execution on EMIB 2.5D/3.5D, Foveros S/R/B, and Foveros Direct 3D Intel foundry advanced packaging technologies.

• Oversee planning, scheduling, and execution of design projects, ensuring milestones and deadlines are met.

• Drive continuous improvement in design methodologies, flows, and processes to enhance quality and efficiency.

• Collaborate with cross-functional teams (technology partners, packaging, analysis, and verification) to ensure seamless integration and manufacturability.

• Provide technical leadership and mentorship, fostering a culture of innovation and accountability.

• Responsible for enabling teams to execute through clear goal setting, facilitating work, maintaining accountability, applying differentiated performance management, and driving team results.

• Drives results by inspiring people, role modeling Intel values, developing the capabilities of others, and ensuring a productive work environment.

Key Responsibilities:

Leadership and Management

• Lead and manage a group of Silicon Packaging Engineers, providing guidance, mentorship, and support to ensure the successful execution of projects.

• Oversee the planning, scheduling, and execution of package design projects, ensuring that milestones and deadlines are met.

• Foster a collaborative and innovative team environment, encouraging continuous learning and professional development.

• Lead design groups, coordinating efforts across multiple teams to achieve project goals.

Technical Expertise

• Serve as the technical lead for the package design team cross multiple products.

• Drive the development of advanced packaging designs, ensuring compliance with industry standards and best practices.

• Collaborate with cross-functional teams, including package architects, silicon and board design teams, design rule owners, electrical analysis engineers, and integration teams to define and implement design specifications.

• Leverage extensive experience in advanced packaging designs to meet design KPIs.

• Influence.

• Ensure products are designed and developed with high quality standards by overseeing design processes, risk management, and compliance throughout the product design lifecycle, working closely with cross-functional teams to identify and address potential quality issues before they arise.

Project Management

• Develop and maintain detailed project plans, including resource allocation, risk management, and progress tracking.

• Coordinate with stakeholders to ensure alignment on project goals, deliverables, and timelines.

• Conduct regular project reviews and provide status updates to senior management.

Innovation and Improvement

• Identify and implement process improvements to enhance the efficiency and quality of package designs and development.

• Stay current with industry trends and emerging technologies, incorporating new methodologies and tools into the design process.

• Drive innovation in product design, exploring new approaches and techniques to achieve competitive advantages.

The ideal candidate should exhibit the following behavioral traits:

• Excellent leadership and team management skills, with the ability to inspire and motivate a diverse team of engineers.

• Strong project management skills, with the ability to manage multiple projects simultaneously and meet deadlines.

• Exceptional problem-solving and analytical skills, with a keen attention to detail.

• Excellent communication and interpersonal skills, with the ability to collaborate effectively with cross-functional teams and stakeholders.

You must possess the below minimum qualifications to be initially considered for this position. Preferred qualifications are in addition to the minimum requirements and are considered a plus factor in identifying top candidates.

Minimum Qualifications:

• Bachelor's degree in Electrical Engineeringor STEM related field with 9+years of relevant experience

• -OR- Master's degree in Electrical Engineeringor STEM related fieldwith 6+ years ofrelevant experience

• -OR- PhD in Electrical Engineeringor STEM related fieldwith 4+ years of relevant experience

Relevant experience should include the following:

• Experience in silicon design, with at least 3 years in a leadership role.

• Proven experience in a leadership or management role, with a track record of successfully leading engineering teams and delivering complex projects withinestablished timelines.

• Experience with design flows and methodologies (physical design, verification).

• Experience working with EDA tools from Cadence, Synopsys, and/or Siemens.

Preferred Qualifications:

• Experience with advanced nodes and packaging technologies

• Experience in RTL2GDS flows and methodologies

Weoffer a total compensation package that ranks among the best in the industry. It consists of competitive pay, stock, bonuses, as well as, benefit programs which include health, retirement, and vacation. Find more information about all of our Amazing Benefits here:

Functional Verification Excellence:

• Perform comprehensive functional verification of CPU logic to ensure designs meet rigorous specification requirements

• Develop detailed IP verification plans, sophisticated test benches, and robust verification environments to ensure complete coverage aligned with CPU microarchitecture specifications

Design Validation and Analysis:

• Execute verification plans and define system simulation models to verify design integrity, analyze power and timing characteristics, and uncover potential issues

• Replicate, root cause, and debug complex issues in thepre-siliconenvironment with precision and efficiency

Problem-Solving and Innovation:

• Identify and implement corrective measures to resolve failing tests and optimize verification processes

• Find creative solutions to complex verification challenges and drive continuous improvement

Cross-Functional Collaboration:

• Collaborate closely with CPU architects, RTL developers, and physical design teams to enhance verification of sophisticated architectural and microarchitectural features

• Work together to achieve ambitious functional, performance, and power goals

Technical Leadership:

• Document comprehensive test plans and lead technical reviews with design and architecture teams

• Maintain and enhance existing functional verification infrastructure and methodology

• Actively participate in defining architecture and microarchitecture features of next-generation CPUs

Requirements listed can be obtained through a combination of industry-relevant job experience, internship experiences, and/orschoolwork/classes/research.

Minimum Qualifications:

• Bachelors in Computer Engineering, Electrical Engineering, or STEM-related field plus 4 years of relevant work experience or Master's degree in Computer Engineering, Electrical Engineering, or STEM-related field plus 2 years of relevant work experience

• 4+ years of work experience in one or more of the following areas:

  • Computer architecture knowledge, including specific areas of technical ownership/expertise relevant to CPUs

  • Validation environment development in C++, Verilog, System Verilog UVM/OVM

  • Programming experience in at least one language: Perl, Python, etc.

Preferred Qualifications:

• Experience withIntel Architecture ISA (Industry Standard Architecture) and system architecture, x86 assembly language

• Experience insoftware validation, including microcode and firmware

• Experience in post-silicon debug and analysis

• Intel or industry experience in micro-architecture, design, or verification of CPU cores

• Experience with hardware modeling languages such as Verilog, VHDL, or System Verilog and industry-standard logic simulation tools

• Validation and debug experience including test writing/generation, checker development, coverage analysis, failure debug, and root cause analysis

• Assembly language programming, code generation, or other low-level software experience

offer a total compensation package that ranks among the best in the industry. It consists of competitive pay, stock, bonuses, as well as, benefit programs which include health, retirement, and vacation. Find more information about all of our Amazing Benefits here:

Intel's Information Security organization supports the unique IT information Security and Compliance requirements for Intel Federal projects that deliver products and/or services to the US Government. As part of this team, you will help us grow our secure solution suite to meet U.S. Government requirements.

Primary duties and responsibilities:

• Installing, securing, upgrading, and patching the SailPoint IdentityIQ solution.
• Development and configuration of various SailPoint IIQ modules (e.g. Compliance Manager, Lifecycle Manager, Connectors).
• Integration of IdentityIQ with Microsoft Active Directory, including design and implementation.
• Designing and deploying custom forms, approval workflows, connectors in SailPoint which will be used for access requests, access certifications, and provisioning.
• Automating processes in the SailPoint toolset using PowerShell scripting.
• Maintaining Infrastructure including Windows servers and SQL Server databases.
• Consulting with customers to create IdentityIQ role and entitlement models that meet security requirements.
• Coordinating security assessments to identify security control failures and recommend corrective actions.
• Assisting with architecting identity security products in secured enclaves, including product testing, validation, and selection.
• Assisting with design and long-term roadmap planning to satisfy future scalability requirements in secure enclaves.
• Business travel is required as needed.
• Ability to thrive in dynamic and fast-paced environments.
• Excellent communication, leadership, strong troubleshooting, debugging, and analytical skills.

You must possess the below minimum qualifications to be initially considered for this position. Preferred qualifications are in addition to the minimum requirements and are considered a plus factor in identifying top candidates. Experience listed below would be obtained through a combination of your degree, research and or relevant previous job and or internship experiences.

Minimum Qualifications:

• US Citizenship required.
• Ability to obtain and maintain a US Government Security Clearance.
• Bachelor's degree in Systems Engineering, Cyber Security Engineering, Computer Engineering, Computer Science, Information Systems, or similar discipline and 4+ years of work-related experience.
• 1+ years' experience in designing and implementing custom SailPoint solutions.
• 1+ years' experience in implementing and supporting SailPoint IIQ modules like Compliance Manager, Lifecycle Manager, Integration modules, in both production and nonproduction environments.

Preferred Qualifications:

• Active US Government Top Secret (TS) Security Clearance with the ability to obtain and maintain SCI access.
• Experience with DoD security implementation (e.g. STIG) and security tools for managing the environment.
• Experience with business continuity and disaster recovery.
• Experience configuring Roles and Entitlements in SailPoint IdentityIQ.
• Experience developing, implementing or supporting APIs (RESTful services preferred)
• Experience integrating SailPoint IdentityIQ with Active Directory.
• Experience with scripting in the Windows environment, preferably in PowerShell.
• Experience with Microsoft SQL Server 2019/2022.
• Experience with Web Tech: HTML, JavaScript, JSP, XML, XSL, and DTD.

Weoffer a total compensation package that ranks among the best in the industry. It consists of competitive pay, stock, bonuses, as well as, benefit programs which include health, retirement, and vacation. Find more information about all of our Amazing Benefits here:

In this role, you will have the opportunity to work on cutting edge technology, use best in class systems and equipment. We expect you to have good scripting skills and be able to process large amounts of performance data, use automation for analyzing and optimizing Graphics performance. You will also work closely with cross-functional teams to ensure our SoCs meet the highest standards of performance, power efficiency and identifying opportunities for improvement.

Minimum qualifications are required to be initially considered for this position. Requirements listed would be obtained through a combination of industry relevant job experience, internship experiences and orschoolwork/classes/research.

Minimum Qualifications

• Bachelor's degree with 3+ years of experience or Master's degree with 2+ years of experience in Electrical Engineering, Computer Engineering or related field.

• Post-silicon validation using test equipment, computer systems, and test station Software development.

• Experience with scripting languages such as Python, C/C++ and/or Perl.

Preferred Qualifications:

• CPU micro-architectural and/or high-speed bus protocol experience.

• Experience in design, verification or validation disciplines, system/platform level debug and root cause isolation, methodology and tools.

• Experience with Power measurement and debug tools

• Experience with leading Automation efforts, planning, execution and overseeing system validation activities.

• Deep technical knowledge in performance and power management including understanding of architecture and microcode sufficient to understand potential Power and performance impacts of changes.

• Familiarity with industry benchmarks, which aspects of performance they measure and competitive analysis from previous gen products.

• Experience with Performance counters.

offer a total compensation package that ranks among the best in the industry. It consists of competitive pay, stock, bonuses, as well as, benefit programs which include health, retirement, and vacation. Find more information about all of our Amazing Benefits here: