Intel CPU Verification Engineer United States, Texas, Austin 785225395
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Job Responsibilities
- Develop and execute comprehensive verification plans to validate CPU logic against architectural specifications.
- Build scalable UVM-based test benches and define robust functional coverage models.
- Run system-level simulations to uncover design bugs and ensure functional integrity.
- Debug and root-cause issues in the pre-silicon environment; implement corrective actions to resolve test failures.
- Collaborate closely with CPU architects and RTL designers to verify complex architectural and microarchitectural features.
- Document verification strategies and lead technical reviews with design and architecture teams.
- Maintain and enhance existing verification infrastructure and methodologies.
- Contribute to the definition and refinement of CPU architecture and microarchitecture features.
Verification Planning & Strategy
- Develop comprehensive verification plans for CPU subsystems including cores, caches, memory controllers, and interconnects.
- Define coverage metrics and verification closure criteria.
- Collaborate with design teams to understand architectural specifications and implementation details.
Test Development & Execution
- Create directed and random test scenarios using SystemVerilog, UVM, and proprietary verification methodologies.
- Develop and maintain testbench infrastructure and verification IP.
- Debug complex functional and timing issues across multiple abstraction levels.
- Execute regression testing and analyze coverage reports.
Methodology & Tools
- Utilize industry-standard EDA tools.
- Implement constrained random verification environments.
- Develop and enhance verification automation scripts and flows.
Collaboration & Communication
- Work closely with CPU architects, RTL designers, and physical design teams.
- Participate in design reviews and provide verification feedback.
- Document verification results and present findings to cross-functional teams.
Core Competencies
- Strong analytical and problem-solving skills.
- Excellent debugging capabilities for complex digital systems.
- Understanding of timing analysis and low-power design concepts.
You must possess the below minimum education requirements and minimum required qualifications to be initially considered for this position. Relevant experience can be obtained through schoolwork, classes, project work, and internships experience. Additional preferred qualifications are in addition to the minimum requirements and are considered a plus factor in identifying top candidates.
Minimum Qualifications
- Bachelor's degree inElectrical/ElectronicsEngineering, Computer Engineeringor in a STEM related field of studywith 3+ years of experience.
- Experience developing SystemVerilog in UVM-based test-benches for reusable and scalable verification environments.
- Experience in scripting language (i.e. Python or Perl).
- Experience in C++.
- Experience implementingvalidation strategies based on architectural and design feature changes.
Preferred Qualifications
- Post Graduate degree inElectrical/ElectronicsEngineering, Computer Engineeringor in a STEM related field of studywith 2+ years of industry experience.
- Solid understanding of digital logic design, including instruction set execution, ALUs, control units, registers, memory, and system buses.
- Experience with Synopsys simulators.
- Experience with agile development methodologies.
Position of Trust
Weoffer a total compensation package that ranks among the best in the industry. It consists of competitive pay, stock, bonuses, as well as, benefit programs which include health, retirement, and vacation. Find more information about all of our Amazing Benefits here:
Annual Salary Range for jobs which could be performed in the US:This role will require an on-site presence. * Job posting details (such as work model, location or time type) are subject to change.These jobs might be a good fit
