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Google ASIC Design Verification Engineer Silicon India, Karnataka, Bengaluru 99707828
08.04.2024
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Minimum qualifications:
Preferred qualifications:
- Bachelor's degree in Electrical Engineering or Computer Science, or equivalent practical experience.
- 4 years of experience in Design Verification.
- Experience verifying digital logic at RTL using SystemVerilog and UVM for ASICs.
Preferred qualifications:
- Master's degree in Electrical Engineering or Computer Science.
- 7 years of experience creating and using verification components and environments in a standard verification methodology such as UVM.
- Experience with verification techniques, System Verilog Assertions (SVA) and assertion-based verification.
- Experience with GLS, low-power DV, and support of SOC DV.
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