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Arm is leading the vision to unlock a broad ecosystem of silicon required for AI, Data centers, mobile, compute and IoT. As a member of Solution engineering, you will be joining a team developing end2end sign-off methodology for system timing/power/thermal/test/yield, implementation, post-silicon characterization and tuning for highly complex industry leading compute and multi-die SoCs. The position requires delivering solution and automation for accurate analysis and co-optimization across all sign-off domains including RC, STA, PDN, Power, yield for system convergence. The position also gives opportunity for leading product level implementation and sign-off. Outstanding expertise in EDA tool-flows and delivery of large scale automation is required for meticulous optimization of power-perf trade-off. The role also brings opportunity to collaborate with foundry, EDA and ecosystem partners in 3nm/2nm technodes and multi-die.
Responsibilities:
· Develop multi-die sign-off flow and automation for best-in-class Fmax and Power/GHz
· Develop PVT, Vdrop and thermal aware methodology and flows enabling custom techniques in multi-voltage design, advanced clocking, critical path analysis and silicon variation.
· Infuse innovative industry tools and internal developed statistical, analytical algorithms and machine learning methodologies to develop and refine STA and IR-PDN-Thermal bottlenecks.
· The suitable candidate will be able to analyze the requirements, define and develop CAD solution including external EDA tools integration.
· Ability to lead a product implementation and sign-off, working closely with internal design teams, foundry and partners.
Required Skills and Experience :
· Strong expertise with end2end silicon convergence with IP char, EDA algorithms, RC, STA and PDN analysis for both on-chip and package.
· Hands-on experience developing large scale automation for co-optimization of PPA and sign-off.
· Hands-on experience with analyzing data for measurable contributions to sign-off methodology and workflows.
· Strong coding proficiency in languages Python, C, Tcl.
· Proficiency with version control systems like git, distributed processing, and disk management.
“Nice To Have” Skills and Experience :
Experience with multi-die SoC design flows, IR and STA convergence and subject areas SoC interfaces, budgeting, constraints, UPF
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