Intel Post Silicon System validation engineer 

India, Karnataka, Bengaluru 

98807081

Job Description:

• Defines, develops, and performs functional validation for integrated SoCs, focusing on validation of IP integration, interaction between IPs, and systemlevel features.
• Applies various hardware and software level tools and techniques to ensure validation coverage and that performance, power, and area goals are met.
• Reviews proposed design changes to assess impact on validation plans, tasks, and timelines.
• Develops SoC validation methodologies, validation test plans, executes validation plans, and collaborates with other engineers for design optimization, troubleshooting, and failure analysis.
• Performs silicon debug to identify root causes and resolves all functional and triage failures for SoC issues.
• Tests interactions between various SoC features using validation infrastructure. Develops postsilicon validation infrastructure (e.g., performance monitors, behavioral checkers, state space coverage) and test environment used in validation testing.
• Publishes SoC validation reports summarizing all validation activities performed, reviews results, and communicates to relevant teams.
• Works with architecture, design, verification, board, platform, and manufacturing teams to maintain and improve debug, validation test strategy, methodologies, and processes for SoC interfaces and to meet desired product specifications.
• Develops content to create or increase specific IP interactions using a variety of tools and techniques (including patching techniques using microcode, firmware, or custom OS builds).
• Engages in all phases of the product life cycle and develops and validates content, infrastructure, and bug hunts in multiple environments (e.g., simulation, emulation, FPGAs) to ensure silicon readiness.

Qualifications:

• Bachelor's/Master's inElectrical/ElectronicEngineering or Computer Engineering or Computer Science with minimum 4 years to 7 years for System Validation of related work experience.
• Must have microarchitecture experience in CPU/SoC/Chipset
• Knowledge of IA/ARM core and system level Power Management architecture and flows, who familiar in Pcode and PMC features, Chip level power management transition states etc. Understanding of System Reset flows and Thermal related Validation expertise is a plus.
• Solid understanding of the Validation and Debug flows of a complex CPU Silicon:
• Knowledge on Validation/ Debug Flows and overall SOC Architecture.
• Pre-silicon Design / Validation knowledge is a value add.
• Good working knowledge in C++/Python SW programming for content development and scripting.
• Knowledge of Verilog/VHDL and EDA design tools and pre si validation methodology is a plus.
• Excellent written and oral communications and experience working in a cross functional team environment are essential
• Good Team player
• Strong problem solving, analytical and debug skills.

: Post silicon validation, python, oscilloscopes, logical analyzers, and debug experience.

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