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Google Physical Verification Convergence Engineer United States, California, Sunnyvale 982158899
06.05.2025
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Minimum qualifications:
Preferred qualifications:
- Bachelor's degree in Electrical Engineering, Computer Engineering, Computer Science, or a related field, or equivalent practical experience.
- 3 years of experience in physical design, verification, and various methodologies.
- Experience in Python, Tcl, or Perl scripting.
Preferred qualifications:
- Master's degree in Computer Engineering, Electrical Engineering, Computer Science, a related field, or equivalent practical experience.
- 3 years of experience in ASIC physical design flows with emphasis on physical verification convergence and tapeout signoff.
- Experience in full chip physical verification signoff on tapeouts on advanced nodes.
- Experience in Padrings, Bumps, Redistribution Layer (RDL) and IP integration (memories, IO's and analog IPs).
- Experience in PnR tools like FusionCompiler or Innovus with regards to physical convergence.
- Knowledge of semiconductor device physics and transistor characteristics.
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