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Google Design Engineer Verification Simulation India, Karnataka, Bengaluru 975095312
11.04.2024
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Minimum qualifications:
Preferred qualifications:
- Experience with SoC low power architecture and design.
- Experience in Power aware verification, Gate level simulations, and Post silicon bring-up.
- Experience creating design verification strategies and constraint random verification with System Verilog and UVM.
Preferred qualifications:
- Bachelor's degree in Computer Science, Electrical Engineering, or equivalent practical experience.
- Experience in post-silicon validation and debug.
- Experience with low power coverage closure and power aware simulations.
- Knowledge of assertion-based formal verification.
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