As part of the WTE pre-silicon team, you will work with SOC, SE, and software partners on the creation of a virtual platform for next-generation cellular and connectivity teams. The role involves modeling new IP’s of cellular SOC’s and integration of subsystems. You will be responsible for developing new simulation models by reading HW specs and using register description files. Works also involve the integration of hybrid simulation to create a complete SOC. You will also be involved in the integration of cycle-accurate CPU models for architecture exploration activities. You will collaborate with SW, SOC and SE teams to understand new HW delta's and convert them to simulation requirements. You will also play pre-silicon architect role to define pre-silicon strategy for simulation and FPGA platforms!