You will learn and be responsible of architecture of the DFT solutions across the SOC (MBIST, SCAN ATPG, LBIST and more)
Develop all the necessary HW / FW / SW for the different modules
Verify and Validate our design
Debug and analyze coverage and yield loss
As a cutting-edge technology company, we are working only with the very advanced DFT tools and features, while developing our own methods and DFT concepts – as it required by the Automotive and Safety related products market (ISO26262).
All you need is:
. or . in electrical engineering.
0-2 years of experience in the ASIC/SoC industry
Knowledge in either SCAN / MBIST / LBIST tools and flows – Advantage
Knowledge of TAP protocols IEEE 1149.1/1500/1687 (iJTAG) - Advantage