Expoint - all jobs in one place

The point where experts and best companies meet

Limitless High-tech career opportunities - Expoint

Google TPU ASIC Design Verification Engineer Machine Learning
United States, California, Sunnyvale
963783814

08.04.2024

Share

Log in to apply

Minimum qualifications:

Bachelor's degree in Computer Science, Electrical Engineering, a related field, or equivalent practical experience.
3 years of experience with industry-standard tools, languages and methodologies relevant to the development of silicon-based ICs and chips.
Experience with SystemVerilog (i.e. SystemVerilog Assertions or functional coverage).

Preferred qualifications:

Master's degree or PhD in Electrical Engineering.
6 years of work experience with full verification life cycle.
Experience verifying digital logic at RTL using SystemVerilog for ASICs.
Experience in Power aware verification, Gate level simulations, and Post silicon bring-up.
Strong problem solver, communicator and team player.

These jobs might be a good fit

Google TPU ASIC Design Verification Engineer Machine Learning United States, California, Sunnyvale

Google TPU ASIC Design Verification Engineer Machine Learning United States, California, Sunnyvale

Google TPU ASIC Design Verification Engineer Machine Learning United States, California, Sunnyvale

Google ASIC Design Verification Engineer Machine Learning United States, California, Sunnyvale

Professional CV Builder tool from Expoint.

Get to the top of the "yes list" with a standout CV!

CREATE CV