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Apple CAD Engineer- Signoff PNR United States, California, Sunnyvale 961498882
06.06.2024
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Description
- Determine signoff criteria for PNR design, STA, Signal Integrity, and Clock construction / simulation- Participate in technology and design reviews- Develop and maintain signoff checks- Develop and maintain scripts for signoff verification- Resolve signoff timing requirements across all modes and corners- Verification of CAD flows- Support and debug signoff flow issues
Key Qualifications
- We are looking for:
- Knowledge of PNR design flows
- Experience with PNR tools such as ICC, EDI, Primetime, Tempus
- Good understanding of STA and Noise analysis flows
- Experience in timing closure, clock tree construction, and signal integrity
- Preferably having experience in synthesis, floor planning, placement, and routing
- Proficient in programming using Python, Perl, and Tcl
Education & Experience
Minimum requirement of BS + 3 years of relevant industry experience
Pay & Benefits
- At Apple, base pay is one part of our total compensation package and is determined within a range. This provides the opportunity to progress as you grow and develop within a role. The base pay range for this role is between $132,300 and $241,500, and your base pay will depend on your skills, qualifications, experience, and location.Note: Apple benefit, compensation and employee stock programs are subject to eligibility requirements and other terms of the applicable plan or program.
Apple is an equal opportunity employer that is committed to inclusion and diversity. We take affirmative action to ensure equal opportunity for all applicants without regard to race, color, religion, sex, sexual orientation, gender identity, national origin, disability, Veteran status, or other legally protected characteristics.
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