Qualcomm Staff Machine Learning ASIC Design Engineer 

Canada, Ontario, Markham 

960975667

Job Area:

Engineering Group, Engineering Group > ASICS Engineering

Minimum Qualifications:

• Bachelor's degree in Science, Engineering, or related field and 4+ years of ASIC design, verification, validation, integration, or related work experience.

Master's degree in Science, Engineering, or related field and 3+ years of ASIC design, verification, validation, integration, or related work experience.

PhD in Science, Engineering, or related field and 2+ years of ASIC design, verification, validation, integration, or related work experience.

Principal Duties:

• Develop of Micro-Architecture and specification based on high level design requirements

• Develop RTL design that meets required performance and is optimized for Area and Power

• Integrate pre-verified sub-IPs to build up larger functionality

• Flow bring up and report analysis for Linting, RTL Synthesis, CLP, CDC

• Work closely with verification team to define testplan, debug regression, analyze coverage reports

• Develop SVA assertions for white box verification for formal verification

• Effective communication across teams, multitasking and well-planned execution of the tasks.

Preferred Qualifications:

• Prior experience delivering Verilog and System Verilog RTL

• Detail oriented with strong analytical and debugging skills

• Strong communication (written and verbal), collaboration, and specification skills

• Practiced design knowledge working with some of the following concepts:

• Clock domain crossing and reset architecture

• Machine Learning HW development

• FIFOs implementation

• Bus implementation/verification techniques

• Memory selection and control

• High speed and low power design optimization

• Bus interface protocols (AHB, AXI)

• Experience with some of the following

• Simulation and code coverage tools (VCS, Verdi, Modeltech/Questa, or Xcelium)

• Design rule and CDC checking (SVA assertions, Spyglass, 0-in, etc.)

• Scripting languages (PERL, Python, TCL, C, etc.)

• Power Intent and Analysis: UPF, CLP, PTPX, PowerPro

• Synthesis: DCG/NXT, FC

• Static Timing: Primetime

• Formal Verification: Conformal, Formality

Minimum Qualifications:

• Legally permitted to work on-site in Canada

• 5+ years of ASIC design, verification, or related work experience.

Qualcomm expects its employees to abide by all applicable policies and procedures, including but not limited to security and other requirements regarding protection of Company confidential information and other confidential and/or proprietary information, to the extent those requirements are permissible under applicable law.