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The ASIC Product Division in Broadcom, a leading supplier of state-of-the-art SoC and embedded IP, is looking for qualified individuals to work in SoC and IP development programs. The candidate will be joining a high performance design team responsible for state-of-the-art subsystem development to meet customer requirements.The engineer will be responsible for a variety of advanced design tasks such as: Discuss the SoC requirements with the customer and the internal teams. Define micro-architectures and provide a specification; RTL development; Synthesis and timing analysis; Design Analysis including Lint/CDC/RDC. This position will also be responsible for analyzing and debugging simulation failures, as well as analyzing coverage results. Candidate must be a highly productive individual contributor with a demonstrated technical capability in system and sub-block level design.
Job Requirements:
A Bachelor’s Degree in Electrical and Electronic Engineering, Computer Science, or equivalent
12+ years relevant industry experience
Experience in design at SoC level and block level
Define micro-architectures and provide a specification
Fluent knowledge of RTL development (Verilog, System Verilog, Synthesis tool, Timing analysis, Lint, CDC and RDC)
Strong working knowledge of Perl and other script languages
Strong and independent design debugging capability
Demonstrated ability to analyze and resolve complex design issues
Must have legal authorization to work in the US
Experience with database management software (DesignSync, GIT, etc)
Experience working with Emulators and FPGA based prototyping
Knowledge of CPU, DDR, Bus Protocol, Network Protocol or DSP design preferred
Experience in ASIC design verification flows and DV methodologies including UVM, SystemC/C++ and other programming language
Compensation and Benefits
The annual base salary range for this position is $126,000 - $210,000.
This position is also eligible for a discretionary annual bonus in accordance with relevant plan documents, and equity in accordance with equity plan documents and equity award agreements.
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