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Google CMOS Device PPA Engineer Silicon 
United States, California, San Diego 
959102028

14.10.2025
Note: By applying to this position you will have an opportunity to share your preferred working location from the following:.
Minimum qualifications:
  • Bachelor's degree in Electrical Engineering, Mechanical Engineering, Materials Science, Chemical Engineering, related degree or equivalent practical experience
  • 10 years of experience in standard cell or block-level characterization and Power, Performance, and Area (PPA) evaluation.
  • Experience in CMOS technology, device characterization, process integration, SPICE simulation, and physical design flows (e.g., Cadence or Synopsys).
  • Experience with data analysis tools (e.g., JMP, or other spreadsheet software).

Preferred qualifications:
  • PhD in Electrical Engineering, Mechanical Engineering, Materials Science, Chemical Engineering, related degree or equivalent practical experience.
  • 10 years of industry experience in both Foundry and Fabless environments.
  • Experience in product-level testing, including yield and parametric evaluation.
  • Experience configuring physical design CAD flows specifically for early technology evaluation and pathfinding.