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Google CPU RTL Front End Designer United States, Oregon, Portland 955067772
20.02.2025
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Minimum qualifications:
Preferred qualifications:
- Bachelor's degree in Electrical Engineering, Computer Engineering, Computer Science, a related field, or equivalent practical experience.
- 3 years of experience with digital logic design principles, RTL design concepts, and languages such as Verilog or SystemVerilog.
- 3 years of experience microprocessor architecture.
- Experience with logic design through coursework.
Preferred qualifications:
- Master's degree or PhD in Electrical Engineering, Computer Engineering or Computer Science, with an emphasis on computer architecture.
- Experience with modern processor microarchitecture and related technologies and algorithms, through academic projects or industry experience
- Knowledge of Programming languages such as C, C++, and Python
- Knowledge of general purpose operating systems such as Linux or Android
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