ARM SoC Performance & PnP Modelling Architect 

United States, California, San Jose 

94984705

• Efficiently drive and resolve architectural investigations and PnP tradeoff studies across various SoC (CPU, GPU, NPU, Media, IO, interconnects, memory controllers) and Platform components.
• Perform detailed workload characterization to identify performance bottlenecks and propose architectural solutions. Collaborate, coordinate, and drive consensus across architects, and IP teams. Conduct workload compaction to facilitate effective modeling.
• Create profiling and visualization frameworks to analyze with right level of abstraction. Contribute to automation for streamlining production processes
• Stay up-to-date on latest advancements in application development, workload characterization, and performance/power/thermal analysis

• Experience (+10 years) in SoC Performance Modeling and analysis in the semiconductor industry.
• A background in Electrical Engineering, Computer Engineering, or Computer Science with an expertise in computer architecture, and microarchitecture.
• Understanding of general-purpose CPU/GPU microarchitecture, including knowledge of areas such as processor pipelines, caches, and memory hierarchy.
• Proficient in C/C++ for programming for large-scale software development, familiarity with SystemC TLM, and Python scripting language skills.
• Excellent communication, and interpersonal skills with ability to convey effectively complicated solutions.
• Drive PnP analysis as an experienced SoC Performance and Power modeling Architect at Arm, focusing on diverse silicon platforms

• Knowledge of interconnect micro-architecture design, PCIe/CXL and CHI protocols.
• Understanding of workloads used for performance optimization under system constraints (TDP, Limits).
• Ability to work in a fast-paced environment with changing priorities and requirements
• Experience with Unix, scripting, and source control systems (e.g., Git, Subversion).

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