Intel SoC Logic Design Engineer 

United States, California, San Jose 

941746406

Key responsibilities include:

• Develops the logic design, register transfer level (RTL) coding, and simulation for an SoC design
• Integrates logic of IP blocks and subsystems into a full chip SoC or discrete component design
• Participates in the definition of architecture and microarchitecture features of the block being designed
• Performs quality checks in various logic design aspects ranging from RTL to timing/power convergence
• Applies various strategies, tools, and methods to write RTL and optimize logic to qualify the design to meet power, performance, area, and timing goals as well as design integrity for physical implementation
• Reviews the verification plan and implementation to ensure design features are verified correctly
• Resolves and implements corrective measures for failing RTL tests to ensure correctness of features
• Follows secure development practices to address the security threat model and security objects within the design
• Works with IP providers to integrate and validate IPs at the SoC level
• Drives quality assurance compliance for smooth IP/SoC handoff
• Excellent communication and documentation skills
• Mentoring team members

You must possess the below minimum education requirements and minimum required qualifications to be initially considered for this position. Relevant experience can be obtained through schoolwork, classes, project work, internships, and/or military experience. Additional preferred qualifications are in addition to the minimum requirements and are considered a plus factor in identifying top candidates.

Minimum Requirements:

• Bachelor's degree in Electrical or Computer Engineering, Computer Science, Math, Physics, or related field plus 9+ years of industry work experience
• Master's degree in Electrical or Computer Engineering, Computer Science, Math, Physics, or related field plus 6+ years of industry work experience
• PhD in Electrical or Computer Engineering, Computer Science, Math, Physics, or related field plus 4+ years of related work experience
• Experience in programming languages such as Python, RTL, and System Verilog.
• Understanding of hardware design, including logic design, state machines, control units, processor sub-systems, and network on chips.
• In-depth knowledge of industry-standard tools and flows for front-end design, including synthesis, STA, Spyglass-based checks, and power domains.

Preferred Qualifications:

• Experience with AES/SHA, as well as compression and decompression algorithms
• Knowledge of Network on Chips and Control Processors

We offer a total compensation package that ranks among the best in the industry. It consists of competitive pay, stock, bonuses, as well as, benefit programs which include health, retirement, and vacation. Find more information about all of our Amazing BenefitsAnnual Salary Range for jobs which could be performed in US, California: $162,041.00-$259,425.00
*Salary range dependent on a number of factors including location and experience