Develops the logic design, register transfer level (RTL) coding, and simulation for an IP required to generate cell libraries, functional units, IP blocks, and subsystems for integration in full chip designs. Participates in the definition of architecture and microarchitecture features of the block being designed. Applies various strategies, tools, and methods to write RTL and optimize logic to qualify the design to meet power, performance, area, and timing goals as well as design integrity for physical implementation. Reviews the verification plan and implementation to ensure design features are verified correctly and resolves and implements corrective measures for failing RTL tests to ensure correctness of features. Supports SoC customers to ensure highquality integration and verification of the IP block. Drives quality assurance compliance for smooth IPSoC handoff.Develop and integrate IP's into SoC catering to various markets.
Perform RTL design, front-end tool flow, and SoC/SS integration.MTech/BTech in Electrical Engineering or Computer Science.
5-7 years in ASIC design.- Proficient in System Verilog/Verilog RTL coding.
- Expertise in power-aware RTL coding/design.
- Strong understanding of micro-architecture development and front-end flows such as Lint, CDC, low-power checks, etc.
- Experience with synthesis, DFT, FV, and STA.
- Familiarity with protocols like AHB, AXI, ACE, and CHI is desirable.
- Hands-on experience in multi-clock designs and asynchronous interfaces.
- Ability to define microarchitecture specifications and technical proposals with logic design.
- Advanced knowledge of low-power techniques and tools such as UPF/CPF and CLP.
- Good understanding of constraint development for physical design implementation and static timing analysis.We offer a total compensation package that ranks among the best in the industry. It consists of competitive pay, stock, bonuses, as well as, benefit programs which include health, retirement, and vacation. Find more information about all of our Amazing BenefitsThis role will require an on-site presence.