Qualcomm CPU Constraint Performance Modeling Engineer Lead 

United States, California 

937776859

Job Area:

Engineering Group, Engineering Group > CPU Engineering

We are hiring talented engineers for CPU Power/Performance Modeling targeted for high performance, low power devices. As a CPU Power/Performance Modeling Engineer, you will contribute ideas for advanced CPU performance and power features, explore them in detail, model them, corelated and characterize them and work with the design team in productizing them. This will also include modeling algorithms to optimize the power consumption and on same time maximize the performance when required for various workloads.

Roles and Responsibilities

• Proficiency in one or more areas of CPU architecture: fetch, decode, branch prediction, renaming, execute units, SIMD, load/store, MMU, caches, retire, etc.

• Understanding of power consumption and estimating power as proxy.

• Collaborate with CPU Performance Architecture and RTL team members to identify opportunities for product improvement.

• Analyze workloads to identify performance bottlenecks, Power constraints and opportunities.

• Perform self-guided performance/power simulation studies of design alternatives

• Knowledge of OS internals and compiler technology a plus

• Write and maintain features and sections of the CPU architectural performance/power model

• Work with RTL and design team to assess implementation cost for new features

• Collaborate with performance team to maintain and improve the simulation environment for increased productivity

Preferred Qualifications

• MS degree in Computer Architecture with 15+ years of practical experience

• Strong CPU architecture knowledge and micro-architecture knowledge

• Experience working in a performance modeling environment

• Proficient in C and C++ and scripting languages such as Perl or Python

• Ability to problem solve and prove your own ideas

• Knowledge and experience with common performance benchmarks and workloads

• Knowledge of microprocessor architecture including expertise in one or more of the following areas: Active power management (DVFS) , Idle power management , Limit management (TDP, Thermal and Over-current protection), Clock management.

• Knowledge of Verilog and/or VHDL. Experience with simulators and waveform debugging tools

• Understanding of low power microarchitecture techniques

Minimum Qualifications:

• Bachelor's degree in Electrical Engineering, Computer Engineering, Computer Science, or related field and 8+ years of Hardware Engineering, Software Engineering, Electrical Engineering, Systems Engineering, or related work experience.

Master's degree in Electrical Engineering, Computer Engineering, Computer Science, or related field and 7+ years of Hardware Engineering, Software Engineering, Electrical Engineering, Systems Engineering, or related work experience.

PhD in Electrical Engineering, Computer Engineering, Computer Science, or related field and 6+ years of Hardware Engineering, Software Engineering, Electrical Engineering, Systems Engineering, or related work experience.

Qualcomm expects its employees to abide by all applicable policies and procedures, including but not limited to security and other requirements regarding protection of Company confidential information and other confidential and/or proprietary information, to the extent those requirements are permissible under applicable law.

Pay range:

$218,000.00 - $327,000.00