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Google Lead CPU RTL Engineer Silicon 
United States, New York, City of Poughkeepsie 
932023888

04.12.2024
Info Note: By applying to this position you will have an opportunity to share your preferred working location from the following: Poughkeepsie, NY, USA; Austin, TX, USA; Mountain View, CA, USA; Portland, OR, USA.Note: By applying to this position you will have an opportunity to share your preferred working location from the following:.
Minimum qualifications:
  • Bachelor's degree in Electrical Engineering, Computer Engineering, Computer Science, or a related field, or equivalent practical experience.
  • 8 years of experience with digital logic design principles, RTL design concepts, and languages such as Verilog or SystemVerilog.
  • Experience with logic synthesis techniques to optimize RTL code, performance and power as well as low-power design techniques.

Preferred qualifications:
  • Master's degree or PhD in Electrical Engineering, Computer Engineering or Computer Science, with an emphasis on computer architecture.
  • Experience with modern processor micro-architecture and related technologies and algorithms.