Intel Analog DV Engineer 

United States, California, Folsom 

929149392

Job Description:

• Drives and develops testability and manufacturability of analog and/or RF integrated circuits from the component feasibility stage through production ramp.

• Contributes to design, development, and validation of testability circuits through evaluation, development, and debug of complex test methods.

• Develops and debugs complex software programs to convert design validation flows and drive complex test equipment, including the development of digital signal processing, BERTS/Scopes, and automatic test equipment (ATE) for testing analog performance.

• Collaborates with designers to drive design for test (DFT) features enabling efficient production testing of new products and requirements for design validation (DV) to ensure performance to internal and industry specifications.

• Works with the design and/or product development team to perform ATE to DV correlation, debug functionality and performance issues, perform circuit characterization, and design spec validation. Evaluates new analog IP designs on ATE and works with the design, DFx, and product development teams to debug functionality and performance issues to root cause.

• Performs ATE and bench device characterization, utilizes that data to define datasheet specifications, and performs margin2spec analysis to project yield and PHI concerns.

• Releases efficient production test solutions that ensure product quality and performance.

• Engages with manufacturing to monitor and optimize production yield and resolves any post release concerns.

• Tests and characterizes for power and thermals, including thermal profiling and recipe tuning for production thermal control.

• Provides tailored trimming and calibration for power delivery and/or thermal sensing circuits to each individual die and provides building blocks for power and performance binning and improvement. Reviews test plans with design, conversion of pre silicon content to patterns, and additional content development as needed, reviews HVM data with design to identify and root cause the issues.

Minimum qualifications are required to be initially considered for this position. Preferred qualifications are in addition to the minimum requirements and are considered a plus factor in identifying top candidates.Minimum Qualifications:

• Bachelor of Science Degree in Electrical Engineering or related field with 4+ years of relevant experience OR

• Master's of Science Degree in Electrical Engineering or related field with 3+ years of relevant experience

Relevant Experience in:

• Microprocessor test (ATE and/or system test and/or pre-silicon verification) experience

• Analog/logic/array/functionalvalidation in post-Si/MFG (and/or pre-Si)

• DFT/DFD, hardware testing methods and tools

• Hardware language (Verilog/SV) and scripting language (Perl/Python)

Preferred Qualifications:

• 4+ years of experience/knowledge in: Circuit design/Si process/test domains Memory BIST (MBIST), SSA memory architecture, LSA memory architecture, Array Redundancy, and Cache Repair Scan architecture, Stuck-At scan, At-Speed scan Background in ATE, automated test equipment

• Background in test program and content development tools/methods/flows

Requirements listed would be obtained through a combination of industry relevant job experience, internship experiences and orschoolwork/classes/research.

Experienced HireShift 1 (United States of America)US, California, Folsom
Position of Trust

Weoffer a total compensation package that ranks among the best in the industry. It consists of competitive pay, stock, bonuses, as well as, benefit programs which include health, retirement, and vacation. Find more information about all of our Amazing Benefits here:

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