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Apple DRAM Design Validation Engineer 
United States, California, Cupertino 
92841505

30.06.2025
  • PhD or MS or BS Degree with 5+ years in DRAM development.
  • Expert in DRAM cell architectures
  • Expert of DRAM memory organization and periphery design for low DRAM power
  • Expertise in DRAM simulation
  • Experience in memory interface verification with understanding DDR-PHY and Memory Controller
  • Experience in LPDDR IO (DDR/DDR2/DDR3/DDR4/DDR5) characterization and qualification
  • Understanding of memory test patterns
  • Knowledge of DRAM reliability
  • Knowledge with innovative packaging technology (POP, TSV, etc.) and their relationship to DRAM signal/power integrity
  • Previous experience in Failure Analysis of DRAM devices
  • Excellent hardware and software debug skill
  • Experience working with the major DRAM vendors
  • Strong background in computer architecture
  • Programming experience in C/C++
  • Excellent interpersonal skills and teamwork
Note: Apple benefit, compensation and employee stock programs are subject to eligibility requirements and other terms of the applicable plan or program.