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Apple Analog Layout Engineer f/m/d 
Germany, Bavaria, Munich 
922238268

27.06.2024
Description
As a member of the AMS layout team you will be responsible to deliver PDV clean layout, this includes the following:- Crafting complex layout for mixed signal, and analog circuits in deep SubMicron CMOS technologies.- Reviewing and analyzing floor-plans and complex circuits with circuit designers.- Running complete set of design verification tools available on AMS blocks.- Working with the circuit design team to plan/schedule work and negotiate any necessary layout trade-offs as needed.- Interpreting LVS, DRC and ERC reports to find the fastest way to complete layout.- Exceeding engineering specifications and expectations by working closely with the circuit design team.- Utilizing advanced CAD tools and mask design knowledge to deliver correct and robust layout that meet stringent matching performance, area and power requirements.
Minimum Qualifications
  • Master’s degree in Electric Engineering with relevant experience
  • Apple is an Equal Opportunity Employer that is committed to inclusion and diversity. We also take affirmative action to offer employment and advancement opportunities to all applicants, including minorities, women, protected veterans, and individuals with disabilities. Apple will not discriminate or retaliate against applicants who inquire about, disclose, or discuss their compensation or that of other applicants.
Preferred Qualifications
  • - Typically requires extensive experience in analog/mixed-signal layout design of deep SubMicron CMOS circuits.
  • - Experience crafting tight matching, low noise, and low power analog blocks, resistors, capacitors, pad IO's, ESD structures, etc.
  • - High level of proficiency in custom and standard cell based floor-planning and hierarchical layout assembly.
  • - Must understand issues of IR drop, RC delay, electro-migration, self heating and cross capacitance.
  • - Must recognize failure prone circuit and layout structures, have experience with analog and DFM standard methodologies, and enthusiastically work with circuit designer for the best approach to problems.
  • - High level of proficiency in interpretation of CALIBRE DRC, ERC, LVS, etc., reports.
  • - Knowledge of MENTOR GRAPHICS or CADENCE layout tools.
  • - Scripting skills in Perl, Python or SKILL are considered a plus, but not required.
  • - Excellent interpersonal skills and able to work with multi-functional teams.
  • - Proficiency in English language is required