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Google ASIC Design Verification Engineer Devices Services United States, California, Mountain View 914541146
04.09.2025
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Minimum qualifications:
Preferred qualifications:
- Bachelor's degree in Electrical Engineering, Computer Engineering, Computer Science, or a related field, or equivalent practical experience
- 8 years of experience with verifying digital logic at RTL level using SystemVerilog or C/C++
- Experience creating and using verification components and environments in standard verification methodology
- Experience verifying digital systems using standard IP components/interconnects (microprocessor cores, hierarchical memory subsystems)
Preferred qualifications:
- Master's degree or PhD in Electrical Engineering, Computer Engineering or Computer Science, with an emphasis on computer architecture
- Experience with performance verification of SOCs, pre-Silicon analysis and post-Silicon correlation
- Experience with building verification methodologies that span simulation, emulation and FPGA prototypes
- Experience with Interconnect Protocols (e.g., AHB, AXI, ACE, CHI, CCIX, CXL)
- Knowledge of scripting languages and software development frameworks
- Architectural background in one or more of the following: Low Power Design, Distributed Systems, DDR/LPDDR, PCIe, Processors and Memory Subsystems, Security, Clock and Power Controllers
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