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Google SOC Static Timing Analysis Engineer India, Karnataka, Bengaluru 91074244
08.04.2024
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Minimum qualifications:
Preferred qualifications:
- Bachelor's degree in Electrical Engineering, Computer Science, or equivalent practical experience.
- 10 years of experience in silicon timing closure and chip integration.
- Experience with STA sign-off constraint authoring for full-chip level, tape-out sign-off requirements, checklists, and associated automation.
Preferred qualifications:
- Master's degree in Electrical Engineering, Computer Science, or equivalent practical experience.
- Experience in design automation using TCL/Perl/Python.
- Experience in extraction of design parameters, Quality of Results (QoR) metrics, and analyzing data trends.
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