Qualcomm Sr Lead Engineer - CPU Validation Debug 

India, Karnataka, Bengaluru 

909554760

Job Area:

Engineering Group, Engineering Group > Hardware Engineering

As a leading technology innovator, Qualcomm pushes the boundaries of what's possible to enable next-generation experiences and drives digital transformation to help create a smarter, connected future for all. As a Qualcomm Hardware Engineer, you will plan, design, optimize, verify, and test electronic systems, bring-up yield, circuits, mechanical systems, Digital/Analog/RF/optical systems, equipment and packaging, test systems, FPGA, and/or DSP systems that launch cutting-edge, world class products. Qualcomm Hardware Engineers collaborate with cross-functional teams to develop solutions and meet performance requirements.

Minimum Qualifications:

• Bachelor's degree in Computer Science, Electrical/Electronics Engineering, Engineering, or related field and 3+ years of Hardware Engineering or related work experience.

Master's degree in Computer Science, Electrical/Electronics Engineering, Engineering, or related field and 2+ years of Hardware Engineering or related work experience.

PhD in Computer Science, Electrical/Electronics Engineering, Engineering, or related field and 1+ year of Hardware Engineering or related work experience.

Mandatory Skills:

· Knowledge of Linux kernel internals (process scheduler, memory management, concurrency / synchronization, memory allocation, file systems) and profiling

· Good understanding of processor architecture, Multicore/Multiprocessor with SMP/heterogenous cores.

· Good understanding on Cache hierarchy, coherency, and snoop concepts

· Good Understanding of CPU Dynamic Frequency and Voltage Switching, Low Power Modes

· C language expertise for low level programming, Assembly language for any processor.

Desired Skills

· Hands on experience On Linux operating system, Kernel debuggers, Kernel and Linux Device drivers

· Exposure to CPU Architecture based on ARM or x86.

· Exposure to Memory architecture, through with Weakly ordered memory model and barriers concepts

· RISC-V architectural knowledge would be an added plus.

· Exposure to SoC architecture paradigms – interconnects, power management.

· Exposure to working on emulation/pre-si environment is added advantage.

· Hands on experience with JTAG based debuggers.

· Bring-up of hardware-software solution on emulation platforms and on fresh SOC designs.

· ASIC digital design fundamentals and methodology would be an added advantage.

Responsibilities

· Create the Complex Test content scenarios in the Linux OS world in the process scheduler, memory management, concurrency / synchronization, memory allocation, file systems

· Able to understand various hardware modules constituting CPU sub-system and its interfaces.

· Ability to work with hardware design team to develop low level drivers for early enablement.

· Chalk out hardware functional validation plan, develop test bench and execute during pre and post silicon SOC bring up phases to expose HW issues.

· Excellent communication skills and ability to work with diverse teams to drive HW debugs to conclusion.

· Use silicon debug hooks to measure power/performance/coverage and other KPI metrics

Qualcomm expects its employees to abide by all applicable policies and procedures, including but not limited to security and other requirements regarding protection of Company confidential information and other confidential and/or proprietary information, to the extent those requirements are permissible under applicable law.