Job DescriptionDalian 3D NAND DMTM is looking for a CMOS Integration engineer candidate. As a PI engineer, you will be responsible to enable current and next generation non-volatile memory CMOS segment integration schemes, and 3D-NAND CMOS density and performance scaling.
Responsibilities include, but are not limited to:
- Plan lot split table for yield, performance improvement.
- Setup lot DOE in MES and monitor lot movement with planned schedule. Setup new production process flow, setup new operation.
- Work closely with process owner for process improvement, SPC chart review, new recipe request Review design, post-gen data, DRC violation.
- Define CD monitor structure Summarize inline SPC chart, defect report, param test electrical data.
- Work closely with yield enhancement team for yield issue solution. Provide instruction to setup param test program.
- Setup request for param data collection.
Minimum Qualifications:Candidate must possess a PhD with 3+yrs experience or Masters degree with 5+yrs experience in a relevant field such as Electrical Engineering, Materials Science and Engineering, Chemical Engineering, Physics or other similar technical degree.Preferred Qualifications:3+ years of experience in the following:Logic process integration or device engineeringParam analysis/reportNAND process integration engineeringWe offer a total compensation package that ranks among the best in the industry. It consists of competitive pay, stock, bonuses, as well as, benefit programs which include health, retirement, and vacation. Find more information about all of our Amazing BenefitsThis role will require an on-site presence.