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Apple Graphics FE Implementation Engineer United States, New York, New York 907827114
06.06.2024
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Key Qualifications
- We seek highly motivated individuals with expert synthesis design experience that understand RTL design principles and can drive quality physical design implementation.
- Own block level synthesis and drive analysis and optimizations using advanced synthesis techniques and RTL design improvement for optimal Area, Timing Power.
- Collaborate with Physical Design and Timing Analysis teams on physical concepts like floor-planning, placement, congestion, and timing constraints.
- Analyze architectural critical paths and drive multi-block closure across RTL Design and Physical Design teams.
- Debug complex logic equivalence issues and reviewing netlist checks to validate functionality and netlist quality.
- Demonstrated ability to solve complex problems across multiple technical domains.
- Develop and Drive adoption of innovative methodologies across projects and teams
- Experience implementing ECOs for functionality and timing.
- Experience with one or more of: reset domain, multi-clock domain, multi-power domain (UPF), linting tools across RTL and Gate-Level.
- Relevant scripting experience in ASIC flows – python, tcl, Perl, Data manipulation.
- Preferred, but not required:
- Familiarity with DFT insertion.
- Familiarity with simulation, debugging tools and experience of working closely with design verification team.
- Experience working on GPUs is desirable.
Education & Experience
We are looking for candidates with BS + 10 years of relevant experience.
Additional Requirements
Apple is an equal opportunity employer that is committed to inclusion and diversity. We take affirmative action to ensure equal opportunity for all applicants without regard to race, color, religion, sex, sexual orientation, gender identity, national origin, disability, Veteran status, or other legally protected characteristics.
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