Microsoft Principal Performance Architect 

United States, Oregon, Hillsboro 

900694116

As the Principal Performance Architect, Silicon Engineering, you will work in the team responsible for SOC/IP performance modeling, including projections, architectural and what-if analysis and direction setting for our programs. You will work closely with the product architecture System On Chip (SOC) architecture teams, IP architecture, to ensure our SOC and IPs enable performant, efficient, and industry-leading systems. The team you’ll be part of will be involved in numerous projects within Microsoft, developing custom silicon for a diverse set of systems. We are responsible for delivering cutting-edge, custom SoC designs that can perform complex and high-performance functions in the most efficient manner.

Required/Minimum Qualifications

• 9+ years of related technical engineering experience
  • OR Bachelor's degree in Electrical Engineering, Computer Engineering, Computer Science, or related field AND 6+ years technical engineering experience or internship experience
  • OR Master's degree in Electrical Engineering, Computer Engineering, Computer Science, or related field AND 4+ years technical engineering experience or internship experience
  • OR Doctorate degree in Electrical Engineering, Computer Engineering, Computer Science, or related field AND 3+ years technical engineering experience.
• 5+ years of experience in computer architecture, System on Chip (SOC) and system-software architectures, and their performance tradeoffs.

Other Qualifications:

• Ability to meet Microsoft, customer and/or government security screening requirements are required for this role. These requirements include, but are not limited to the following specialized security screenings: Microsoft Cloud Background Check: This position will be required to pass the Microsoft Cloud Background Check upon hire/transfer and every two years thereafter.

Additional or Preferred Qualifications:

• Experience developing SOC performance modeling techniques and benchmarks from conception to microarchitecture specification.
• Significant understanding of input/output (I/O), memory subsystems, coherency flows, interconnect, Quality of Service (QoS) traffic.
• Knowledge of performance monitors and post-silicon SOC and performance tuning is a plus.
• Excellent communication, collaboration and teamwork skills and ability to contribute to diverse and inclusive teams.

Certain roles may be eligible for benefits and other compensation. Find additional benefits and pay information here:

• In this high impact & highly visible role on the team, you will be responsible for:
• Developing performance modeling methodologies by creating and owning System on Chip/ Intellectual Property (SOC/IP) cycle
• Accurate/approximate performance models and analysis tools in C++ and Python.
• Using workload information and working with Micro-architects and RTL team to identify performance bottlenecks.
• Collaborate across functional to propose architectural/microarchitectural changes and provide the required quantitative justification.
• Verifying the correlation of the SOC performance models to the Register Transfer Level (RTL) implementation.
• Collaborating across teams to come up with the best solution possible with a One Microsoft mindset.
• Challenging the status quo with a growth mindset to push the envelope and enable world-class SOC products across Microsoft.