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Key Responsibilities
Execute all stages of the physical design flow, including:
Synthesis
Floorplanning
Place and Route (P&R)
Clock Tree Synthesis (CTS)
Static Timing Analysis (STA)
Power and clock distribution
Reliability and noise analysis
Perform verification and signoff tasks such as:
Formal equivalence verification
Static and dynamic power integrity checks
Layout verification
Electrical Rule Checking (ERC)
Analyze design results and recommend fixes for violations to support current and future product architectures.
Optimize designs for power, performance, and area (PPA).
Contribute to the development and automation of physical design methodologies and flows.
Required Skills & Experience
Low power design techniques
Physical/structural design flow
Timing constraints
Timing closure and physical clock design
Proficiency with industry-standard EDA tools
Bachelor’s (NFQ 8) or Master’s( NFQ 9)degree in Engineering or equivalent
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