Broadcom VLSI Technical Design Verification Engineer 

India, Karnataka 

892978500

VLSI Technical engineer with 8-12 years of experience in SOC/TOP Level
Functional verification
He/she should have strong knowledge of following
• Working experience in IP / SoC/Subsystem/verification
• Expertise to develop Soc/Top level verification environments using System
Verilog and UVM
• Expertise to develop BFMs / Checkers / monitors / Scoreboards
• Must have developed block/system level verification plans and tests.
• Must have capability to debug test failures to find the root cause.
• Must have worked on code / functional coverage.
• Experience in constrained random testing is a plus.
• Domain skills : Any networkingprotocol/Ethernet/Pcie/CPU
• Gate-level /SDF simulations
• Knowledge of scripting languages like Perl, Tcl
•
CAD Tools : Cadence/Synopsys
Education Qualification: Bachelors/Master’s in Electronics/Computer Engg