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Intel Consumer IO IP Design Verification Engineer Malaysia, Penang 887826294
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An IP Design Verification Engineer specializing in Consumer IO IP for a range of Client products.
The engineer will have the chance to develop a comprehensive and high-quality test coverage strategy to ensure the proper interaction and interception between high-speed IO IPs and PHY, as well as between the Power Management Unit and PHY.
The responsibilities cover: -
Performs functional verification of IP logic to ensure design will meet specification requirements.
Develops IP verification plans, test benches, and the verification environment to ensure coverage to confirm to microarchitecture specifications.
Executes verification plans and defines and runs simulation models to verify the design and uncover bugs. Replicates, root causes, and debugs issues in the presilicon environment.
Understands SoC/Subsystem validation environment and provides IP validation support.
Collaborates with architects and RTL developers to improve verification of complex architectural and microarchitectural features.
Finds and implements corrective measures to resolve failing tests. Documents test plans and drives technical reviews of plans and proofs with design and architecture teams.
Maintains and improves existing functional verification infrastructure and methodology. Participates in the definition of verification infrastructure and related TFMs needed for functional design verification.
Qualifications
The applicant should have a bachelor's degree in Electrical and Electronics or Computer or equivalent Engineering or higher.
Familiarity or experience in RTL design verification with System Verilog.
Knowledge in any high-speed IO IPs, such as USB or PCIe or PIPE Data Lane is a strong plus.
Good analyzing and debug skills, and creative in problem-solving.
Strong skills in communication, initiative, innovation, and collaboration in a diverse team.
Positive energy and highly motivated to learn and adapt to fast-evolving IP technologies and environments.
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